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Paper
Design of a reference voltage buffer for a 10-bit 50 MS/s SAR ADC in 65 nm CMOS.
Prakash Harikumar
,
J. Jacob Wikner
Venue
C
ISCAS
Year
2015
Proceedings
ISCAS
DBLP record
conf/iscas/HarikumarW15 ↗
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