Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
ISCAS
/
Paper
A 1.2V multi Gb/s/pin memory interface circuits with high linearity and low mismatch.
Tae-Hyoung Kim
,
Uk-Rae Cho
,
Hyun-Geun Byun
Venue
C
ISCAS
Year
2005
Proceedings
ISCAS (2)
DBLP record
conf/iscas/KimCB05a ↗
Browse the full
ISCAS paper archive
.