A 12-Bit SAR ADC with Reference Voltage Ripple Suppression.
Wei-Chih Lai, Tzu-Hsiang Hsu, Chih-Cheng Chen, Chih-Cheng Hsieh
Browse the full ISCAS paper archive.
Wei-Chih Lai, Tzu-Hsiang Hsu, Chih-Cheng Chen, Chih-Cheng Hsieh
Browse the full ISCAS paper archive.