A 0.35μm CMOS 200kHz-2GHz Fully-Analogue Closed-Loop Circuit for Continuous-Time Clock Duty-Cycle Correction in Integrated Digital Systems.
Andrea De Marcellis, Marco Faccio, Elia Palange
Browse the full ISCAS paper archive.
Andrea De Marcellis, Marco Faccio, Elia Palange
Browse the full ISCAS paper archive.