A RISC-V Neuromorphic Micro-Controller Unit (vMCU) with Event-Based Physical Interface and Computational Memory for Low-Latency Machine Perception and Intelligence at the Edge.

Daniel R. Mendat, Jonah P. Sengupta, Gaspar Tognetti, Martin Villemur, Philippe O. Pouliquen, Sergio Montano, Kayode Sanni, Jamal Lottier Molin, Nishant Zachariah, Isidoros Doxas, Andreas G. Andreou

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