An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture.
Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee
Browse the full ISCAS paper archive.
Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee
Browse the full ISCAS paper archive.