An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks.
Mohammad Javad Sekonji, Ali Mahani, Maryam Mirsadeghi, Mahdi Taheri
Browse the full ISCAS paper archive.
Mohammad Javad Sekonji, Ali Mahani, Maryam Mirsadeghi, Mahdi Taheri
Browse the full ISCAS paper archive.