A Single Channel Two-Stage 12b 500MS/s Pipelined-SAR ADC with Reset-independent Asynchronous SAR Logic and Differential Flipped Voltage Follower Based Two-Stage Open-Loop Dynamic Amplifier.

Qing Su, Wenhao Ren, Jingyuan Xu, Xuan Guo, Hanbo Jia, Xuqiang Zheng, Linzhen Wu, Kai Sun, Nan Sun, Xinyu Liu

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