A 0.57-pJ/bit Adaptive CTLE with Novel High-Pass Node Sampling Adaptation for Wireline Receivers in 28-nm CMOS.
Yudi Wang, Chang Liu, Liu Wang, Zhiwei Wei, Bo Li
Browse the full ISCAS paper archive.
Yudi Wang, Chang Liu, Liu Wang, Zhiwei Wei, Bo Li
Browse the full ISCAS paper archive.