Design and analysis of full-chip HV ESD protection in BCD30V for mixed-signal ICs.
Shijun Wang, Fai Yao, Li Wang, Rui Ma, C. Zhang, Zongyu Dong, Albert Wang, Zitao Shi, Yuhua Cheng, Baoyong Chi, Tianling Ren
Browse the full ISCAS paper archive.
Shijun Wang, Fai Yao, Li Wang, Rui Ma, C. Zhang, Zongyu Dong, Albert Wang, Zitao Shi, Yuhua Cheng, Baoyong Chi, Tianling Ren
Browse the full ISCAS paper archive.