PSVS: A Parallel-Series Voltage-Sensing 1T4R RRAM Macro Achieving 15-Level Storage and 17.88 Mb/mm
Kaijun Zhang, Wencong Wu, Peizhe Li, Jiapei Zheng, Jinru Lai, Xiaoxin Xu, Qi Liu, Chixiao Chen
Browse the full ISCAS paper archive.
Kaijun Zhang, Wencong Wu, Peizhe Li, Jiapei Zheng, Jinru Lai, Xiaoxin Xu, Qi Liu, Chixiao Chen
Browse the full ISCAS paper archive.