0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology.
Volker Dudek, Reinhard Grube, Bernd Hfflinger, Michael Schau
Browse the full ISLPED paper archive.
Volker Dudek, Reinhard Grube, Bernd Hfflinger, Michael Schau
Browse the full ISLPED paper archive.