Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture.
Yang Zhang, Dan Feng, Zhipeng Tan, Jingning Liu, Wei Tong, Chengning Wang
VenueCISPA
Year2018
ProceedingsISPA/IUCC/BDCloud/SocialCom/SustainCom
DBLP recordconf/ispa/Zhang0TLTW18 ↗
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