A Two-Level Caching Mechanism for Demand-Based Page-Level Address Mapping in NAND Flash Memory Storage Systems.
Zhiwei Qin, Yi Wang, Duo Liu, Zili Shao
VenueARTAS
Year2011
ProceedingsIEEE Real-Time and Embedded Technology and Applications Symposium
DBLP recordconf/rtas/QinWLS11 ↗
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