Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
SECON
/
Paper
FPGA Implementation of a Power-Efficient and Low-Memory Capacity Turbo Decoding Architecture.
Jie Zeng
,
Ming Zhan
,
Yaqin Shi
Venue
B
SECON
Year
2018
Proceedings
SECON
DBLP record
conf/secon/ZengZS18 ↗
Browse the full
SECON paper archive
.