Aamer Jaleel
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
53
Venues
11
Active years
2001–2026
Best venue rank
A*
Where they publish
Papers
53 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCA | Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense. | Jeonghyun Woo, Junsu Kim, Aamer Jaleel, Prashant J. Nair |
| 2025 | HPCA | OASIS: Object-Aware Page Management for Multi-GPU Systems. | Yueqi Wang, Bingyao Li, Mohamed Tarek Ibn Ziad, Lieven Eeckhout, Jun Yang, Aamer Jaleel, Xulong Tang |
| 2025 | HPCA | QPRAC: Towards Secure and Practical PRAC-based Rowhammer Mitigation using Priority Queues. | Jeonghyun Woo, Shaopeng Chris Lin, Prashant J. Nair, Aamer Jaleel, Gururaj Saileshwar |
| 2024 | HPCA | GRIT: Enhancing Multi-GPU Performance with Fine-Grained Dynamic Page Placement. | Yueqi Wang, Bingyao Li, Aamer Jaleel, Jun Yang, Xulong Tang |
| 2024 | ISCA | PrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers. | Aamer Jaleel, Gururaj Saileshwar, Stephen W. Keckler, Moinuddin K. Qureshi |
| 2024 | MICRO | STAR: Sub-Entry Sharing-Aware TLB for Multi-Instance GPU. | Bingyao Li, Yueqi Wang, Tianyu Wang, Lieven Eeckhout, Jun Yang, Aamer Jaleel, Xulong Tang |
| 2024 | MICRO | MINT: Securely Mitigating Rowhammer with a Minimalist in-DRAM Tracker. | Moinuddin Qureshi, Salman Qazi, Aamer Jaleel |
| 2024 | MICRO | ImPress: Securing DRAM Against Data-Disturbance Errors via Implicit Row-Press Mitigation. | Anish Saxena, Aamer Jaleel, Moinuddin Qureshi |
| 2023 | ASPLOS | Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling. | Toluwanimi O. Odemuyiwa, Hadi Asghari Moghaddam, Michael Pellauer, Kartik Hegde, Po-An Tsai, Neal Clayton Crago, Aamer Jaleel, John D. Owens, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher |
| 2023 | ISCA | Implicit Memory Tagging: No-Overhead Memory Safety Using Alias-Free Tagged ECC. | Michael B. Sullivan, Mohamed Tarek Ibn Ziad, Aamer Jaleel, Stephen W. Keckler |
| 2023 | ISPASS | Community-based Matrix Reordering for Sparse Linear Algebra Optimization. | Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Stephen W. Keckler |
| 2023 | MICRO | IDYLL: Enhancing Page Translation in Multi-GPUs via Light Weight PTE Invalidations. | Bingyao Li, Yanan Guo, Yueqi Wang, Aamer Jaleel, Jun Yang, Xulong Tang |
| 2021 | HPCA | P-OPT: Practical Optimal Cache Replacement for Graph Analytics. | Vignesh Balaji, Neal Clayton Crago, Aamer Jaleel, Brandon Lucia |
| 2020 | HPCA | HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems. | Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David W. Nellans |
| 2019 | ISCA | Adaptive memory-side last-level GPU caching. | Xia Zhao, Almutaz Adileh, Zhibin Yu, Zhiying Wang, Aamer Jaleel, Lieven Eeckhout |
| 2019 | MICRO | ExTensor: An Accelerator for Sparse Tensor Algebra. | Kartik Hegde, Hadi Asghari Moghaddam, Michael Pellauer, Neal Clayton Crago, Aamer Jaleel, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher |
| 2018 | ISCA | ACCORD: Enabling Associativity for Gigascale DRAM Caches by Coordinating Way-Install and Way-Prediction. | Vinson Young, Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi |
| 2018 | MICRO | Combining HW/SW Mechanisms to Improve NUMA Performance of Multi-GPU Systems. | Vinson Young, Aamer Jaleel, Evgeny Bolotin, Eiman Ebrahimi, David W. Nellans, Oreste Villa |
| 2017 | DAC | RIC: Relaxed Inclusion Caches for Mitigating LLC Side-Channel Attacks. | Mehmet Kayaalp, Khaled N. Khasawneh, Hodjat Asghari Esfeden, Jesse Elwell, Nael B. Abu-Ghazaleh, Dmitry V. Ponomarev, Aamer Jaleel |
| 2017 | ISCA | MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability. | Akhil Arunkumar, Evgeny Bolotin, Benjamin Y. Cho, Ugljesa Milic, Eiman Ebrahimi, Oreste Villa, Aamer Jaleel, Carole-Jean Wu, David W. Nellans |
| 2017 | MICRO | Beyond the socket: NUMA-aware GPUs. | Ugljesa Milic, Oreste Villa, Evgeny Bolotin, Akhil Arunkumar, Eiman Ebrahimi, Aamer Jaleel, Alex Ramrez, David W. Nellans |
| 2016 | DAC | A high-resolution side-channel attack on last-level cache. | Mehmet Kayaalp, Nael B. Abu-Ghazaleh, Dmitry V. Ponomarev, Aamer Jaleel |
| 2016 | ISCA | LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches. | Hsiang-Yun Cheng, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie |
| 2016 | MICRO | CANDY: Enabling coherent DRAM caches for multi-node systems. | Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi |
| 2016 | MICRO | The Bunker Cache for spatio-value approximation. | Joshua San Miguel, Jorge Albericio, Natalie D. Enright Jerger, Aamer Jaleel |
| 2015 | HPCA | High performing cache hierarchies for server workloads: Relaxing inclusion to capture the latency benefits of exclusive caches. | Aamer Jaleel, Joseph Nuzman, Adrian Moga, Simon C. Steely Jr., Joel S. Emer |
| 2015 | ISCA | BEAR: techniques for mitigating bandwidth bloat in gigascale DRAM caches. | Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi |
| 2014 | HPCA | Undersubscribed threading on clustered cache architectures. | Wim Heirman, Trevor E. Carlson, Kenzo Van Craeynest, Ibrahim Hur, Aamer Jaleel, Lieven Eeckhout |
| 2014 | HPCA | Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers. | Seth H. Pugsley, Zeshan Chishti, Chris Wilkerson, Peng-fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien Lu, Kingsum Chow, Rajeev Balasubramonian |
| 2014 | ICS | Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor. | Wim Heirman, Trevor E. Carlson, Kenzo Van Craeynest, Ibrahim Hur, Aamer Jaleel, Lieven Eeckhout |
| 2014 | MICRO | CAMEO: A Two-Level Memory Organization with Capacity of Main Memory and Flexibility of Hardware-Managed Cache. | Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi |
| 2013 | ICCAD | Trace alignment algorithms for offline workload analysis of heterogeneous architectures. | Muhammet Mustafa Ozdal, Aamer Jaleel, Paolo Narvez, Steven M. Burns, Ganapati Srinivasa |
| 2013 | ISCA | Triggered instructions: a control paradigm for spatially-programmed architectures. | Angshuman Parashar, Michael Pellauer, Michael Adler, Bushra Ahsan, Neal Clayton Crago, Daniel Lustig, Vladimir Pavlov, Antonia Zhai, Mohit Gambhir, Aamer Jaleel, Randy L. Allmon, Rachid Rayess, Stephen Maresh, Joel S. Emer |
| 2012 | ASPLOS | CRUISE: cache replacement and utility-aware scheduling. | Aamer Jaleel, Hashem Hashemi Najaf-abadi, Samantika Subramaniam, Simon C. Steely Jr., Joel S. Emer |
| 2012 | ISCA | Scheduling heterogeneous multi-cores through performance impact estimation (PIE). | Kenzo Van Craeynest, Aamer Jaleel, Lieven Eeckhout, Paolo Narvez, Joel S. Emer |
| 2012 | MICRO | CoLT: Coalesced Large-Reach TLBs. | Binh Pham, Viswanathan Vaidyanathan, Aamer Jaleel, Abhishek Bhattacharjee |
| 2011 | MICRO | SHiP: signature-based hit predictor for high performance caching. | Carole-Jean Wu, Aamer Jaleel, William Hasenplaugh, Margaret Martonosi, Simon C. Steely Jr., Joel S. Emer |
| 2011 | MICRO | PACMan: prefetch-aware cache management for high performance caching. | Carole-Jean Wu, Aamer Jaleel, Margaret Martonosi, Simon C. Steely Jr., Joel S. Emer |
| 2010 | HPCA | Explaining cache SER anomaly using DUE AVF measurement. | Arijit Biswas, Charles Recchia, Shubhendu S. Mukherjee, Vinod Ambrose, Leo Chan, Aamer Jaleel, Athanasios E. Papathanasiou, Mike Plaster, Norbert Seifert |
| 2010 | ISCA | High performance cache replacement using re-reference interval prediction (RRIP). | Aamer Jaleel, Kevin B. Theobald, Simon C. Steely Jr., Joel S. Emer |
| 2010 | MICRO | Achieving Non-Inclusive Cache Performance with Inclusive Caches: Temporal Locality Aware (TLA) Cache Management Policies. | Aamer Jaleel, Eric Borch, Malini Bhandaru, Simon C. Steely Jr., Joel S. Emer |
| 2009 | ISPASS | CMPSched$im: Evaluating OS/CMP interaction on shared cache management. | Jaideep Moses, Konstantinos Aisopos, Aamer Jaleel, Ravi R. Iyer, Ramesh Illikkal, Donald Newell, Srihari Makineni |
| 2009 | ISPDC | Understanding the Memory Behavior of Emerging Multi-core Workloads. | Junmin Lin, Yu Chen, Wenlong Li, Aamer Jaleel, Zhizhong Tang |
| 2008 | HiPC | Data Sharing Analysis of Emerging Parallel Media Mining Workloads. | Yu Chen, Wenlong Li, Junmin Lin, Aamer Jaleel, Zhizhong Tang |
| 2007 | HPCA | Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling. | Brinda Ganesh, Aamer Jaleel, David Wang, Bruce L. Jacob |
| 2007 | ISCA | Adaptive insertion policies for high performance caching. | Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., Joel S. Emer |
| 2007 | ISPASS | Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation. | Wenlong Li, Eric Q. Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du |
| 2007 | ISPASS | Cross Binary Simulation Points. | Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder |
| 2006 | HPCA | Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads. | Aamer Jaleel, Matthew Mattina, Bruce L. Jacob |
| 2005 | HPCA | Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions. | Aamer Jaleel, Bruce L. Jacob |
| 2005 | ISPASS | BioBench: A Benchmark Suite of Bioinformatics Applications. | Kursad Albayraktaroglu, Aamer Jaleel, Xue Wu, Manoj Franklin, Bruce L. Jacob, Chau-Wen Tseng, Donald Yeung |
| 2001 | HiPC | Improving the Precise Interrupt Mechanism of Software-Managed TLB Miss Handlers. | Aamer Jaleel, Bruce L. Jacob |
| 2001 | ICCD | In-Line Interrupt Handling for Software-Managed TLBs. | Aamer Jaleel, Bruce L. Jacob |