| 2025 | S-DMA: Sparse Diffusion Models Acceleration via Spatiality-Aware Prediction and Dimension-Adaptive Dataflow. | Zihan Zou, Xinming Yan, Shun Zhang, Peng Zheng, Guang Yang, Hao Cai, Bo Liu |
| 2025 | PolymorPIC: Embedding Polymorphic Processing-in-Cache in RISC-V based Processor for Full-stack Efficient AI Inference. | Cheng Zou, Ziling Wei, Jun Yan Lee, Chen Nie, Kang You, Zhezhi He |
| 2025 | AxCore: A Quantization-Aware Approximate GEMM Unit for LLM Inference. | Jiaxiang Zou, Yonghao Chen, Xingyu Chen, Chenxi Xu, Xinyu Chen |
| 2025 | ATR: Out-of-Order Register Release Exploiting Atomic Regions. | Yinyuan Zhao, Surim Oh, Mingsheng Xu, Heiner Litz |
| 2025 | Characterizing and Optimizing Realistic Workloads on a Commercial Compute-in-SRAM Device. | Niansong Zhang, Wenbo Zhu, Courtney Golden, Dan Ilan, Hongzheng Chen, Christopher Batten, Zhiru Zhang |
| 2025 | OneAdapt: Resource-Adaptive Compilation of Measurement-Based Quantum Computing for Photonic Hardware. | Hezi Zhang, Jixuan Ruan, Dean Tullsen, Yufei Ding, Ang Li, Travis S. Humble |
| 2025 | Sonar: A Hardware Fuzzing Framework to Uncover Contention Side Channels in Processors. | Kanqi Zhang, Peinan Li, Miao Li, Xin Tian, Zelong Du, Quanchen Liu, Yongqiang Lyu, Yu Jiang, Dan Meng, Rui Hou |
| 2025 | Towards Closing the Performance Gap for Cryptographic Kernels Between CPUs and Specialized Hardware. | Naifeng Zhang, Sophia Fu, Franz Franchetti |
| 2025 | TransFusion: End-to-End Transformer Acceleration via Graph Fusion and Pipelining. | Linxuan Zhang, Jos Nelson Amaral, Di Niu |
| 2025 | ColumnDisturb: Understanding Column-based Read Disturbance in Real DRAM Chips and Implications for Future Systems. | Ismail Emir Yuksel, Ataberk Olgun, Nisa Bostanci, Haocong Luo, Abdullah Giray Yagliki, Onur Mutlu |
| 2025 | ComPASS: A Compatible PIM Protocol Architecture and Scheduling Solution for Processor-PIM Collaboration. | Seunghyuk Yu, Hyeonu Kim, Kyoungho Jeun, Sunyoung Hwang, Seongmin Cho, Eojin Lee |
| 2025 | 3D-PATH: A Hierarchy LUT Processing-in-memory Accelerator with Thermal-aware Hybrid Bonding Integration. | Zhiheng Yue, Yang Wang, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin |
| 2025 | DiffTest-H: Toward Semantic-Aware Communication in Hardware-Accelerated Processor Verification. | Kunlin You, Yinan Xu, Kehan Feng, Luoshan Cai, Yaoyang Zhou, Yungang Bao |
| 2025 | StreamTensor: Make Tensors Stream in Dataflow Accelerators for LLMs. | Hanchen Ye, Deming Chen |
| 2025 | PyTorchSim: A Comprehensive, Fast, and Accurate NPU Simulation Framework. | Wonhyuk Yang, Yunseon Shin, Okkyun Woo, Geonwoo Park, Hyungkyu Ham, Jeehoon Kang, Jongse Park, Gwangsun Kim |
| 2025 | FexMo: Enabling Fuse Execution Mode for Multi-task CGRAs. | Yufei Yang, Chenhao Xie, Chuliang Guo, Liansheng Liu, Xiyuan Peng, Datong Liu, Yu Peng |
| 2025 | Misam: Machine Learning Assisted Dataflow Selection in Accelerators for Sparse Matrix Multiplication. | Sanjali Yadav, Amirmahdi Namjoo, Bahar Asgari |
| 2025 | Bootes: Boosting the Efficiency of Sparse Accelerators Using Spectral Clustering. | Sanjali Yadav, Bahar Asgari |
| 2025 | LLM.265: Video Codecs are Secretly Tensor Codecs. | Ceyu Xu, Yongji Wu, Xinyu Yang, Beidi Chen, Matthew Lentz, Danyang Zhuo, Lisa Wu Wills |
| 2025 | X-SET: An Efficient Graph Pattern Matching Accelerator With Order-Aware Parallel Intersection Units. | Chenxi Xu, Tianhui Shi, Shixuan Sun, Jidong Zhai, Xinyu Chen |
| 2025 | ReGate: Enabling Power Gating in Neural Processing Units. | Yuqi Xue, Jian Huang |
| 2025 | Amove: Accelerating LLMs through Mitigating Outliers and Salient Points via Fine-Grained Grouped Vectorized Data Type. | Xilong Xie, Liang Wang, Limin Xiao, Meng Han, Lei Liu, Xiangrong Xu, Jinquan Wang, Zhen Song, Xiaojian Liao |
| 2025 | Kelle: Co-design KV Caching and eDRAM for Efficient LLM Serving in Edge Computing. | Tianhua Xia, Sai Qian Zhang |
| 2025 | MUSS-TI: Multi-level Shuttle Scheduling for Large-Scale Entanglement Module Linked Trapped-Ion. | Xian Wu, Chenghong Zhu, Jingbo Wang, Xin Wang |
| 2025 | MHE-TPE: Multi-Operand High-Radix Encoder for Mixed-Precision Fixed-Point Tensor Processing Engines. | Qizhe Wu, Jinyi Zhou, Zhanhe Hu, Zhichen Zeng, Huawen Liang, Jiuru Zhu, Linfeng Tao, Xin Zhang, Zekang Cheng, Letian Zhao, Wei Yuan, Xiaotian Wang, Xi Jin |