| 2026 | CGO | GRANII: Selection and Ordering of Primitives in GRAph Neural Networks using Input Inspection. | Damitha Lenadora, Vimarsh Sathia, Gerasimos Gerogiannis, Serif Yesil, Josep Torrellas, Charith Mendis |
| 2026 | HPCA | PhasedStore: Supporting High-Performance Write-Through Cache-Coherence Protocols Under TSO. | Burak Ocalan, Chloe Alverti, Shashwat Jaiswal, Antonis Psistakis, David A. Koufaty, Suyash Mahar, Steven Swanson, Josep Torrellas |
| 2026 | HPCA | AccelFlow: Orchestrating an On-Package Ensemble of Fine-Grained Accelerators for Microservices. | Jovan Stojkovic, Abraham Farrell, Zhangxiaowen Gong, Christopher J. Hughes, Josep Torrellas |
| 2026 | ISCA | ATX: Accelerator Task Extensions. | Gerasimos Gerogiannis, Stijn Eyerman, Josep Torrellas, Wim Heirman |
| 2026 | ISCA | PowerGrad: Hierarchical Power Management for Power-Limited ML Inference Clusters. | Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Alper Buyuktosunoglu, Aporva Amarnath, Pradip Bose, Josep Torrellas |
| 2026 | ISCA | Dorado: Clustered Hardware Cache Coherence for 1,000+ Cores. | Jovan Stojkovic, Abraham Farrell, Gerasimos Gerogiannis, Zhangxiaowen Gong, Christopher J. Hughes, Josep Torrellas |
| 2025 | ASPLOS | CXLfork: Fast Remote Fork over CXL Fabrics. | Chloe Alverti, Stratos Psomadakis, Burak Ocalan, Shashwat Jaiswal, Tianyin Xu, Josep Torrellas |
| 2025 | ASPLOS | TAPAS: Thermal- and Power-Aware Scheduling for LLM Inference in Cloud Platforms. | Jovan Stojkovic, Chaojie Zhang, igo Goiri, Esha Choukse, Haoran Qiu, Rodrigo Fonseca, Josep Torrellas, Ricardo Bianchini |
| 2025 | HPCA | Concord: Rethinking Distributed Coherence for Software Caches in Serverless Environments. | Jovan Stojkovic, Chloe Alverti, Alan Andrade, Nikoleta Iliakopoulou, Hubertus Franke, Tianyin Xu, Josep Torrellas |
| 2025 | HPCA | DynamoLLM: Designing LLM Inference Clusters for Performance and Energy Efficiency. | Jovan Stojkovic, Chaojie Zhang, igo Goiri, Josep Torrellas, Esha Choukse |
| 2025 | ICML | COGNATE: Acceleration of Sparse Tensor Programs on Emerging Hardware using Transfer Learning. | Chamika Sudusinghe, Gerasimos Gerogiannis, Damitha Lenadora, Charles Block, Josep Torrellas, Charith Mendis |
| 2025 | ISCA | MeshSlice: Efficient 2D Tensor Parallelism for Distributed DNN Training. | Hyoungwook Nam, Gerasimos Gerogiannis, Josep Torrellas |
| 2025 | ISCA | HardHarvest: Hardware-Supported Core Harvesting for Microservices. | Jovan Stojkovic, Chunao Liu, Muhammad Shahbaz, Josep Torrellas |
| 2025 | MICRO | Micro-MAMA: Multi-Agent Reinforcement Learning for Multicore Prefetching. | Charles Block, Gerasimos Gerogiannis, Josep Torrellas |
| 2025 | MICRO | DECA: A Near-Core LLM Decompression Accelerator Grounded on a 3D Roofline Model. | Gerasimos Gerogiannis, Stijn Eyerman, Evangelos Georganas, Wim Heirman, Josep Torrellas |
| 2025 | MICRO | NetSparse: In-Network Acceleration of Distributed Sparse Kernels. | Gerasimos Gerogiannis, Dimitrios Merkouriadis, Charles Block, Annus Zulfiqar, Filippos Tofalos, Muhammad Shahbaz, Josep Torrellas |
| 2025 | MICRO | Chameleon: Adaptive Caching and Scheduling for Many-Adapter LLM Inference Environments. | Nikoleta Iliakopoulou, Jovan Stojkovic, Chloe Alverti, Tianyin Xu, Hubertus Franke, Josep Torrellas |
| 2025 | OSDI | EMT: An OS Framework for New Memory Translation Architectures. | Siyuan Chai, Jiyuan Zhang, Jongyul Kim, Alan Wang, Fan Chung, Jovan Stojkovic, Weiwei Jia, Dimitrios Skarlatos, Josep Torrellas, Tianyin Xu |
| 2024 | ASPLOS | Two-Face: Combining Collective and One-Sided Communication for Efficient Distributed SpMM. | Charles Block, Gerasimos Gerogiannis, Charith Mendis, Ariful Azad, Josep Torrellas |
| 2024 | ASPLOS | Everywhere All at Once: Co-Location Attacks on Public Cloud FaaS. | Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher, Josep Torrellas |
| 2024 | ASPLOS | Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud. | Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher, Josep Torrellas |
| 2024 | HPCA | HotTiles: Accelerating SpMM with Heterogeneous Accelerator Architectures. | Gerasimos Gerogiannis, Sriram Aananthakrishnan, Josep Torrellas, Ibrahim Hur |
| 2024 | HPCA | MINOS: Distributed Consistency and Persistency Protocol Implementation & Offloading to SmartNICs. | Antonis Psistakis, Fabien Chaix, Josep Torrellas |
| 2024 | ISCA | HADES: Hardware-Assisted Distributed Transactions in the Age of Fast Networks and SmartNICs. | Apostolos Kokolis, Antonis Psistakis, Benjamin Reidys, Jian Huang, Josep Torrellas |
| 2024 | ISCA | EcoFaaS: Rethinking the Design of Serverless Environments for Energy Efficiency. | Jovan Stojkovic, Nikoleta Iliakopoulou, Tianyin Xu, Hubertus Franke, Josep Torrellas |
| 2024 | MICRO | Mosaic: Harnessing the Micro-Architectural Resources of Servers in Serverless Environments. | Jovan Stojkovic, Esha Choukse, Enrique Saurez, igo Goiri, Josep Torrellas |
| 2024 | SC | Distributed-Memory Parallel Algorithms for Sparse Matrix and Sparse Tall-and-Skinny Matrix Multiplication. | Isuru Ranawaka, Md Taufique Hussain, Charles Block, Gerasimos Gerogiannis, Josep Torrellas, Ariful Azad |
| 2023 | ASPLOS | Untangle: A Principled Framework to Design Low-Leakage, High-Performance Dynamic Partitioning Schemes. | Zirui Neil Zhao, Adam Morrison, Christopher W. Fletcher, Josep Torrellas |
| 2023 | HPCA | Memory-Efficient Hashed Page Tables. | Jovan Stojkovic, Namrata Mantri, Dimitrios Skarlatos, Tianyin Xu, Josep Torrellas |
| 2023 | HPCA | SpecFaaS: Accelerating Serverless Applications with Speculative Function Execution. | Jovan Stojkovic, Tianyin Xu, Hubertus Franke, Josep Torrellas |
| 2023 | ISCA | SPADE: A Flexible and Scalable Accelerator for SpMM and SDDMM. | Gerasimos Gerogiannis, Serif Yesil, Damitha Lenadora, Dingyuan Cao, Charith Mendis, Josep Torrellas |
| 2023 | ISCA | μManycore: A Cloud-Native CPU for Tail at Scale. | Jovan Stojkovic, Chunao Liu, Muhammad Shahbaz, Josep Torrellas |
| 2023 | ISCA | MXFaaS: Resource Sharing in Serverless Environments for Parallelism and Efficiency. | Jovan Stojkovic, Tianyin Xu, Hubertus Franke, Josep Torrellas |
| 2023 | MICRO | Micro-Armed Bandit: Lightweight & Reusable Reinforcement Learning for Microarchitecture Decision-Making. | Gerasimos Gerogiannis, Josep Torrellas |
| 2023 | PPoPP | WISE: Predicting the Performance of Sparse Matrix Vector Multiplication with Machine Learning. | Serif Yesil, Azin Heidarshenas, Adam Morrison, Josep Torrellas |
| 2022 | ASPLOS | Parallel virtualized memory translation with nested elastic cuckoo page tables. | Jovan Stojkovic, Dimitrios Skarlatos, Apostolos Kokolis, Tianyin Xu, Josep Torrellas |
| 2022 | ASPLOS | Pinned loads: taming speculative loads in secure processors. | Zirui Neil Zhao, Houxiang Ji, Adam Morrison, Darko Marinov, Josep Torrellas |
| 2022 | ISCA | Graphite: optimizing graph neural networks on CPUs through cooperative software-hardware techniques. | Zhangxiaowen Gong, Houxiang Ji, Yao Yao, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas |
| 2022 | ICS | Cloak: tolerating non-volatile cache read latency. | Apostolos Kokolis, Namrata Mantri, Shrikanth Ganapathy, Josep Torrellas, John Kalamatianos |
| 2022 | ICS | Dense dynamic blocks: optimizing SpMM for processors with vector and matrix units using machine learning techniques. | Serif Yesil, Jos E. Moreira, Josep Torrellas |
| 2021 | ASPLOS | Jamais vu: thwarting microarchitectural replay attacks. | Dimitrios Skarlatos, Zirui Neil Zhao, Riccardo Paccagnella, Christopher W. Fletcher, Josep Torrellas |
| 2021 | ASPLOS | Speculative interference attacks: breaking invisible speculation schemes. | Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella, Jiyong Yu, Zirui Neil Zhao, Xiang Zou, Thomas Unterluggauer, Josep Torrellas, Carlos V. Rozas, Adam Morrison, Frank McKeen, Fangfei Liu, Ron Gabor, Christopher W. Fletcher, Abhishek Basak, Alaa R. Alameldeen |
| 2021 | DATE | Fuzzy-Token: An Adaptive MAC Protocol for Wireless-Enabled Manycores. | Antonio Franques, Sergi Abadal, Haitham Hassanieh, Josep Torrellas |
| 2021 | HPCA | WiDir: A Wireless-Enabled Directory Cache Coherence Protocol. | Antonio Franques, Apostolos Kokolis, Sergi Abadal, Vimuth Fernando, Sasa Misailovic, Josep Torrellas |
| 2021 | ISCA | Maya: Using Formal Control to Obfuscate Power Side Channels. | Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Alexander G. Schwing, Josep Torrellas |
| 2021 | ISCA | Execution Dependence Extension (EDE): ISA Support for Eliminating Fences. | Thomas Shull, Ilias Vougioukas, Nikos Nikoleris, Wendy Elsasser, Josep Torrellas |
| 2021 | MICRO | Distributed Data Persistency. | Apostolos Kokolis, Antonis Psistakis, Benjamin Reidys, Jian Huang, Josep Torrellas |
| 2021 | NSDI | One Protocol to Rule Them All: Wireless Network-on-Chip using Deep Reinforcement Learning. | Suraj Jog, Zikun Liu, Antonio Franques, Vimuth Fernando, Sergi Abadal, Josep Torrellas, Haitham Hassanieh |
| 2021 | SYSTOR | UniHeap: managing persistent objects across managed runtimes for non-volatile memory. | Daixuan Li, Benjamin Reidys, Jinghan Sun, Thomas Shull, Josep Torrellas, Jian Huang |
| 2020 | ASPLOS | Elastic Cuckoo Page Tables: Rethinking Virtual Memory Translation for Parallelism. | Dimitrios Skarlatos, Apostolos Kokolis, Tianyin Xu, Josep Torrellas |
| 2020 | ISCA | BabelFish: Fusing Address Translations for Containers. | Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, Josep Torrellas |
| 2020 | ISCA | Speculative Data-Oblivious Execution: Mobilizing Safe Prediction For Safe and Efficient Speculative Execution. | Jiyong Yu, Namrata Mantri, Josep Torrellas, Adam Morrison, Christopher W. Fletcher |
| 2020 | ICS | Snug: architectural support for relaxed concurrent priority queueing in chip multiprocessors. | Azin Heidarshenas, Tanmay Gangwani, Serif Yesil, Adam Morrison, Josep Torrellas |
| 2020 | ICS | V-Combiner: speeding-up iterative graph processing on a shared-memory platform with vertex merging. | Azin Heidarshenas, Serif Yesil, Dimitrios Skarlatos, Sasa Misailovic, Adam Morrison, Josep Torrellas |
| 2020 | MICRO | SAVE: Sparsity-Aware Vector Engine for Accelerating DNN Training and Inference on CPUs. | Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Sara S. Baghsorkhi, Josep Torrellas |
| 2020 | MICRO | P-INSPECT: Architectural Support for Programmable Non-Volatile Memory Frameworks. | Apostolos Kokolis, Thomas Shull, Jian Huang, Josep Torrellas |
| 2020 | MICRO | Draco: Architectural and Operating System Support for System Call Security. | Dimitrios Skarlatos, Qingrong Chen, Jianyan Chen, Tianyin Xu, Josep Torrellas |
| 2020 | MICRO | Speculation Invariance (InvarSpec): Faster Safe Execution Through Program Analysis. | Zirui Neil Zhao, Houxiang Ji, Mengjia Yan, Jiyong Yu, Christopher W. Fletcher, Adam Morrison, Darko Marinov, Josep Torrellas |
| 2020 | SC | Speeding up SpMV for power-law graph analytics by enhancing locality & vectorization. | Serif Yesil, Azin Heidarshenas, Adam Morrison, Josep Torrellas |
| 2020 | SIGCOMM | Millimeter wave wireless network on chip using deep reinforcement learning. | Suraj Jog, Zikun Liu, Antonio Franques, Vimuth Fernando, Haitham Hassanieh, Sergi Abadal, Josep Torrellas |
| 2019 | ASPLOS | Replica: A Wireless Manycore for Communication-Intensive and Approximate Data. | Vimuth Fernando, Antonio Franques, Sergi Abadal, Sasa Misailovic, Josep Torrellas |
| 2019 | HPCA | PageSeer: Using Page Walks to Trigger Page Swaps in Hybrid Memory Systems. | Apostolos Kokolis, Dimitrios Skarlatos, Josep Torrellas |
| 2019 | HPCA | NoMap: Speeding-Up JavaScript Using Hardware Transactional Memory. | Thomas Shull, Jiho Choi, Mara Jess Garzarn, Josep Torrellas |
| 2019 | ISCA | Designing vertical processors in monolithic 3D. | Bhargava Gopireddy, Josep Torrellas |
| 2019 | ISCA | MicroScope: enabling microarchitectural replay attacks. | Dimitrios Skarlatos, Mengjia Yan, Bhargava Gopireddy, Read Sprabery, Josep Torrellas, Christopher W. Fletcher |
| 2019 | ISCA | SecDir: a secure directory to defeat directory side-channel attacks. | Mengjia Yan, Jen-Yang Wen, Christopher W. Fletcher, Josep Torrellas |
| 2019 | ISCAS | Opportunistic Beamforming in Wireless Network-on-Chip. | Sergi Abadal, Adrin Marruedo, Antonio Franques, Hamidreza Taghvaee, Albert Cabellos-Aparicio, Jin Zhou, Josep Torrellas, Eduard Alarcn |
| 2019 | MICRO | Tangram: Integrated Control of Heterogeneous Computers. | Raghavendra Pradyumna Pothukuchi, Joseph L. Greathouse, Karthik Rao, Christopher Erb, Leonardo Piga, Petros G. Voulgaris, Josep Torrellas |
| 2019 | MICRO | InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy (Corrigendum). | Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, Adam Morrison, Christopher W. Fletcher, Josep Torrellas |
| 2019 | MICRO | Speculative Taint Tracking (STT): A Comprehensive Protection for Speculatively Accessed Data. | Jiyong Yu, Mengjia Yan, Artem Khyzha, Adam Morrison, Josep Torrellas, Christopher W. Fletcher |
| 2019 | PLDI | Reusable inline caching for JavaScript performance. | Jiho Choi, Thomas Shull, Josep Torrellas |
| 2019 | PLDI | AutoPersist: an easy-to-use Java NVM framework based on reachability. | Thomas Shull, Jian Huang, Josep Torrellas |
| 2019 | SC | Understanding priority-based scheduling of graph algorithms on a shared-memory platform. | Serif Yesil, Azin Heidarshenas, Adam Morrison, Josep Torrellas |
| 2019 | SP | Attack Directories, Not Caches: Side Channel Attacks in a Non-Inclusive World. | Mengjia Yan, Read Sprabery, Bhargava Gopireddy, Christopher W. Fletcher, Roy H. Campbell, Josep Torrellas |
| 2019 | VEE | QuickCheck: using speculation to reduce the overhead of checks in NVM frameworks. | Thomas Shull, Jian Huang, Josep Torrellas |
| 2018 | HPCA | Record-Replay Architecture as a General Security Framework. | Yasser Shalabi, Mengjia Yan, Nima Honarmand, Ruby B. Lee, Josep Torrellas |
| 2018 | ISCA | HetCore: TFET-CMOS Hetero-Device Architecture for CPUs and GPUs. | Bhargava Gopireddy, Dimitrios Skarlatos, Wenjuan Zhu, Josep Torrellas |
| 2018 | ISCA | Yukta: Multilayer Resource Controllers to Maximize Efficiency. | Raghavendra Pradyumna Pothukuchi, Sweta Yamini Pothukuchi, Petros G. Voulgaris, Josep Torrellas |
| 2018 | ISCAS | Millimeter-Wave Propagation within a Computer Chip Package. | Xavier Timoneda, Sergi Abadal, Albert Cabellos-Aparicio, Dionysios Manessis, Jin Zhou, Antonio Franques, Josep Torrellas, Eduard Alarcn |
| 2018 | MICRO | InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy. | Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, Adam Morrison, Christopher W. Fletcher, Josep Torrellas |
| 2017 | ISCA | ShortCut: Architectural Support for Fast Object Access in Scripting Languages. | Jiho Choi, Thomas Shull, Mara Jess Garzarn, Josep Torrellas |
| 2017 | ISCA | Secure Hierarchy-Aware Cache Replacement Policy (SHARP): Defending Against Cache-Based Side Channel Attacks. | Mengjia Yan, Bhargava Gopireddy, Thomas Shull, Josep Torrellas |
| 2017 | MICRO | Xylem: enhancing vertical thermal conduction in 3D processor-memory stacks. | Aditya Agrawal, Josep Torrellas, Sachin Idgunji |
| 2017 | MICRO | Pageforge: a near-memory content-aware page-merging architecture. | Dimitrios Skarlatos, Nam Sung Kim, Josep Torrellas |
| 2016 | ASPLOS | WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication. | Sergi Abadal, Albert Cabellos-Aparicio, Eduard Alarcn, Josep Torrellas |
| 2016 | ASPLOS | CASPAR: Breaking Serialization in Lock-Free Multicore Synchronization. | Tanmay Gangwani, Adam Morrison, Josep Torrellas |
| 2016 | HiPC | Compiler Support for Software Cache Coherence. | Sanket Tavarageri, Wooil Kim, Josep Torrellas, P. Sadayappan |
| 2016 | HiPC | Toward Extreme-Scale Processor Chips. | Josep Torrellas |
| 2016 | HPCA | SCsafe: Logging sequential consistency violations continuously and precisely. | Yuelu Duan, David A. Koufaty, Josep Torrellas |
| 2016 | HPCA | ScalCore: Designing a core for voltage scalability. | Bhargava Gopireddy, Choungki Song, Josep Torrellas, Nam Sung Kim, Aditya Agrawal, Asit K. Mishra |
| 2016 | ISCA | Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures. | Raghavendra Pradyumna Pothukuchi, Amin Ansari, Petros G. Voulgaris, Josep Torrellas |
| 2016 | MICRO | A MAC protocol for Reliable Broadcast Communications in Wireless Network-on-Chip. | Albert Mestres, Sergi Abadal, Josep Torrellas, Eduard Alarcn, Albert Cabellos-Aparicio |
| 2016 | MICRO | Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. | Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert C. N. Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas |
| 2016 | MICRO | ReplayConfusion: Detecting cache-based covert channel attacks using record and replay. | Mengjia Yan, Yasser Shalabi, Josep Torrellas |
| 2015 | ASPLOS | Asymmetric Memory Fences: Optimizing Both Performance and Implementability. | Yuelu Duan, Nima Honarmand, Josep Torrellas |
| 2014 | ASPLOS | RelaxReplay: record and replay for relaxed-consistency multiprocessors. | Nima Honarmand, Josep Torrellas |
| 2014 | DATE | Extreme-scale computer architecture: Energy efficiency from the ground up | Josep Torrellas |
| 2014 | HPCA | Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules. | Aditya Agrawal, Amin Ansari, Josep Torrellas |
| 2014 | HPCA | Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks. | Amin Ansari, Asit K. Mishra, Jianping Xu, Josep Torrellas |
| 2014 | HPCA | Dynamically detecting and tolerating IF-Condition Data Races. | Shanxiang Qi, Abdullah Muzahid, Wonsun Ahn, Josep Torrellas |
| 2014 | ISCA | Replay debugging: Leveraging record and replay for program debugging. | Nima Honarmand, Josep Torrellas |
| 2014 | ISCA | OmniOrder: Directory-based conflict serialization of transactions. | Xuehai Qian, Benjamn Sahelices, Josep Torrellas |
| 2014 | PLDI | Improving JavaScript performance by deconstructing the type system. | Wonsun Ahn, Jiho Choi, Thomas Shull, Mara Jess Garzarn, Josep Torrellas |
| 2014 | SC | Using an Adaptive HPC Runtime System to Reconfigure the Cache Hierarchy. | Ehsan Totoni, Josep Torrellas, Laxmikant V. Kal |
| 2013 | ASPLOS | DeAliaser: alias speculation using atomic region support. | Wonsun Ahn, Yuelu Duan, Josep Torrellas |
| 2013 | ASPLOS | Cyrus: unintrusive application-level record-replay for replay parallelism. | Nima Honarmand, Nathan Dautenhahn, Josep Torrellas, Samuel T. King, Gilles Pokam, Cristiano Pereira |
| 2013 | ASPLOS | Volition: scalable and precise sequential consistency violation detection. | Xuehai Qian, Josep Torrellas, Benjamn Sahelices, Depei Qian |
| 2013 | HPCA | Refrint: Intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies. | Aditya Agrawal, Prabhat Jain, Amin Ansari, Josep Torrellas |
| 2013 | HPCA | Illusionist: Transforming lightweight cores into aggressive cores on demand. | Amin Ansari, Shuguang Feng, Shantanu Gupta, Josep Torrellas, Scott A. Mahlke |
| 2013 | HPCA | Runnemede: An architecture for Ubiquitous High-Performance Computing. | Nicholas P. Carter, Aditya Agrawal, Shekhar Borkar, Romain Cledat, Howard David, Dave Dunning, Joshua B. Fryman, Ivan Ganev, Roger A. Golliver, Rob C. Knauerhase, Richard Lethin, Benot Meister, Asit K. Mishra, Wilfred R. Pinfold, Justin Teller, Josep Torrellas, Nicolas Vasilache, Ganesh Venkatesh, Jianping Xu |
| 2013 | HPCA | EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing. | Ulya R. Karpuzcu, Abhishek A. Sinkar, Nam Sung Kim, Josep Torrellas |
| 2013 | ISCA | WeeFence: toward making fences free in TSO. | Yuelu Duan, Abdullah Muzahid, Josep Torrellas |
| 2013 | ISCA | QuickRec: prototyping an intel architecture extension for record and replay of multithreaded programs. | Gilles Pokam, Klaus Danne, Cristiano Pereira, Rolf Kassa, Tim Kranich, Shiliang Hu, Justin Emile Gottschlich, Nima Honarmand, Nathan Dautenhahn, Samuel T. King, Josep Torrellas |
| 2013 | MICRO | BulkCommit: scalable and fast commit of atomic blocks in a lazy multiprocessor environment. | Xuehai Qian, Josep Torrellas, Benjamn Sahelices, Depei Qian |
| 2012 | DSN | VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages. | Ulya R. Karpuzcu, Krishna B. Kolluru, Nam Sung Kim, Josep Torrellas |
| 2012 | HPCA | BulkCompactor: Optimized deterministic execution via Conflict-Aware commit of atomic blocks. | Yuelu Duan, Xing Zhou, Wonsun Ahn, Josep Torrellas |
| 2012 | HPCA | BulkSMT: Designing SMT processors for atomic-block execution. | Xuehai Qian, Benjamn Sahelices, Josep Torrellas |
| 2012 | HPCA | Pacman: Tolerating asymmetric data races with unintrusive hardware. | Shanxiang Qi, Norimasa Otsuki, Lois Orosa Nogueira, Abdullah Muzahid, Josep Torrellas |
| 2012 | ICCD | FlexRAM: Toward an advanced Intelligent Memory system. | Yi Kang, Wei Huang, Seung-Moon Yoo, Diana Keen, Zhenzhou Ge, Vinh Vi Lam, Pratap Pattnaik, Josep Torrellas |
| 2012 | ICCD | FlexRAM: Toward an advanced Intelligent Memory system: A retrospective paper. | Josep Torrellas |
| 2012 | ISPASS | Comparing the power and performance of Intel's SCC to state-of-the-art CPUs and GPUs. | Ehsan Totoni, Babak Behzad, Swapnil Ghike, Josep Torrellas |
| 2012 | MICRO | Vulcan: Hardware Support for Detecting Sequential Consistency Violations Dynamically. | Abdullah Muzahid, Shanxiang Qi, Josep Torrellas |
| 2011 | ISCA | Rebound: scalable checkpointing for coherent shared memory. | Rishi Agarwal, Pranav Garg, Josep Torrellas |
| 2011 | ISCA | FlexBulk: intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes. | Rishi Agarwal, Josep Torrellas |
| 2010 | HPCA | LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores. | Brian Greskamp, Ulya R. Karpuzcu, Josep Torrellas |
| 2010 | HPCA | Extreme scale computing: Challenges and opportunities. | Josep Torrellas, Bill Gropp, Vivek Sarkar, Jaime H. Moreno, Kunle Olukotun |
| 2010 | MICRO | AtomTracker: A Comprehensive Approach to Atomic Region Inference and Violation Detection. | Abdullah Muzahid, Norimasa Otsuki, Josep Torrellas |
| 2010 | MICRO | InstantCheck: Checking the Determinism of Parallel Programs Using On-the-Fly Incremental Hashing. | Adrian Nistor, Darko Marinov, Josep Torrellas |
| 2010 | MICRO | ScalableBulk: Scalable Cache Coherence for Atomic Blocks in a Lazy Environment. | Xuehai Qian, Wonsun Ahn, Josep Torrellas |
| 2010 | PPoPP | Extreme scale computing: challenges and opportunities. | Josep Torrellas, Bill Gropp, Jaime H. Moreno, Kunle Olukotun, Vivek Sarkar |
| 2009 | ASPLOS | Capo: a software-hardware interface for practical deterministic multiprocessor replay. | Pablo Montesinos, Matthew Hicks, Samuel T. King, Josep Torrellas |
| 2009 | HPCA | Blueshift: Designing processors for timing speculation from the ground up. | Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles |
| 2009 | ISCA | SigRace: signature-based data race detection. | Abdullah Muzahid, Daro Surez Gracia, Shanxiang Qi, Josep Torrellas |
| 2009 | MICRO | BulkCompiler: high-performance sequential consistency through cooperative compiler and hardware support. | Wonsun Ahn, Shanxiang Qi, M. Nicolaides, Josep Torrellas, Jae-Woo Lee, Xing Fang, Samuel P. Midkiff, David C. Wong |
| 2009 | MICRO | The BubbleWrap many-core: popping cores for sequential acceleration. | Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas |
| 2009 | MICRO | Light64: lightweight hardware support for data race detection during systematic testing of parallel programs. | Adrian Nistor, Darko Marinov, Josep Torrellas |
| 2008 | ASPLOS | Concurrency control with data coloring. | Luis Ceze, Christoph von Praun, Calin Cascaval, Pablo Montesinos, Josep Torrellas |
| 2008 | ASPLOS | SoftSig: software-exposed hardware signatures for code analysis and optimization. | James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas |
| 2008 | ISCA | DeLorean: Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Effciently. | Pablo Montesinos, Luis Ceze, Josep Torrellas |
| 2008 | ISCA | Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors. | Radu Teodorescu, Josep Torrellas |
| 2008 | MICRO | EVAL: Utilizing processors with variation-induced timing errors. | Smruti R. Sarangi, Brian Greskamp, Abhishek Tiwari, Josep Torrellas |
| 2008 | MICRO | Facelift: Hiding and slowing down aging in multicores. | Abhishek Tiwari, Josep Torrellas |
| 2007 | DSN | Using Register Lifetime Predictions to Protect Register Files against Soft Errors. | Pablo Montesinos, Wei Liu, Josep Torrellas |
| 2007 | HPCA | Colorama: Architectural Support for Data-Centric Synchronization. | Luis Ceze, Pablo Montesinos, Christoph von Praun, Josep Torrellas |
| 2007 | ICCD | CAP: Criticality analysis for power-efficient speculative multithreading. | James Tuck, Wei Liu, Josep Torrellas |
| 2007 | ISCA | BulkSC: bulk enforcement of sequential consistency. | Luis Ceze, James Tuck, Pablo Montesinos, Josep Torrellas |
| 2007 | ISCA | ReCycle: : pipeline adaptation to tolerate process variation. | Abhishek Tiwari, Smruti R. Sarangi, Josep Torrellas |
| 2007 | ISCAS | Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates. | Brian Greskamp, Smruti R. Sarangi, Josep Torrellas |
| 2007 | MICRO | Uncorq: Unconstrained Snoop Request Delivery in Embedded-Ring Multiprocessors. | Karin Strauss, Xiaowei Shen, Josep Torrellas |
| 2007 | MICRO | Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing. | Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Josep Torrellas |
| 2006 | ASPLOS | Accurate and efficient filtering for the Intel thread checker race detector. | Paul Sack, Brian E. Bliss, Zhiqiang Ma, Paul Petersen, Josep Torrellas |
| 2006 | DSN | CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging. | Smruti R. Sarangi, Brian Greskamp, Josep Torrellas |
| 2006 | HPCA | ReViveI/O: efficient handling of I/O in highly-available rollback-recovery servers. | Jun Nakano, Pablo Montesinos, Kourosh Gharachorloo, Josep Torrellas |
| 2006 | ISCA | Bulk Disambiguation of Speculative Threads in Multiprocessors. | Luis Ceze, James Tuck, Josep Torrellas, Calin Cascaval |
| 2006 | ISCA | Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors. | Karin Strauss, Xiaowei Shen, Josep Torrellas |
| 2006 | MICRO | PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection. | Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep Torrellas |
| 2006 | MICRO | Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware. | Smruti R. Sarangi, Abhishek Tiwari, Josep Torrellas |
| 2006 | MICRO | Scalable Cache Miss Handling for High Memory-Level Parallelism. | James Tuck, Luis Ceze, Josep Torrellas |
| 2006 | PPoPP | POSH: a TLS compiler that exploits program structure. | Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin Strauss, Jose Renau, Josep Torrellas |
| 2005 | FCCM | Prototyping Architectural Support for Program Rollback Using FPGAs. | Radu Teodorescu, Josep Torrellas |
| 2005 | ICS | Thread-Level Speculation on a CMP can be energy efficient. | Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti R. Sarangi, James Tuck, Josep Torrellas |
| 2005 | ICS | Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation. | Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, Josep Torrellas |
| 2004 | ISCA | iWatcher: Efficient Architectural Support for Software Debugging. | Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou, Josep Torrellas |
| 2004 | MICRO | AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-Based Invariants. | Pin Zhou, Wei Liu, Long Fei, Shan Lu, Feng Qin, Yuanyuan Zhou, Samuel P. Midkiff, Josep Torrellas |
| 2003 | HPCA | Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors. | Mara Jess Garzarn, Milos Prvulovic, Jos Mara Llabera, Vctor Vials, Lawrence Rauchwerger, Josep Torrellas |
| 2003 | ISCA | Positional Adaptation of Processors: Application to Energy Reduction. | Michael C. Huang, Jose Renau, Josep Torrellas |
| 2003 | ISCA | ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes. | Milos Prvulovic, Josep Torrellas |
| 2003 | PPoPP | Programming the FlexRAM parallel intelligent memory system. | Basilio B. Fraguela, Jose Renau, Paul Feautrier, David A. Padua, Josep Torrellas |
| 2002 | ASPLOS | Speculative synchronization: applying thread-level speculation to explicitly parallel applications. | Jos F. Martnez, Josep Torrellas |
| 2002 | HPCA | Speculative Multithreading Eliminating Squashes through Learning Cross-Thread Violations in Speculative Parallelization for Multiprocessors. | Marcelo H. Cintra, Josep Torrellas |
| 2002 | ISCA | ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors. | Milos Prvulovic, Josep Torrellas, Zheng Zhang |
| 2002 | ISCA | Using a User-Level Memory Thread for Correlation Prefetching. | Yan Solihin, Josep Torrellas, Jaejin Lee |
| 2002 | ISLPED | Energy-efficient hybrid wakeup logic. | Michael C. Huang, Jose Renau, Josep Torrellas |
| 2002 | MICRO | Cherry: checkpointed early resource recycling in out-of-order microprocessors. | Jos F. Martnez, Jose Renau, Michael C. Huang, Milos Prvulovic, Josep Torrellas |
| 2001 | HPCA | Automatically Mapping Code on an Intelligent Memory Architecture. | Jaejin Lee, Yan Solihin, Josep Torrellas |
| 2001 | ISCA | Removing architectural bottlenecks to the scalability of speculative parallelization. | Milos Prvulovic, Mara Jess Garzarn, Lawrence Rauchwerger, Josep Torrellas |
| 2001 | ISLPED | L1 data cache decomposition for energy efficiency. | Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas |
| 2000 | HPCA | Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration. | Josep Torrellas, Liuxi Yang, Anthony-Trung Nguyen |
| 2000 | ICCD | Unified Fine-Granularity Buffering of Index and Data: Approach and Implementation. | Qiang Cao, Josep Torrellas, H. V. Jagadish |
| 2000 | ISCA | Architectural support for scalable speculative parallelization in shared-memory multiprocessors. | Marcelo H. Cintra, Jos F. Martnez, Josep Torrellas |
| 2000 | MICRO | A framework for dynamic energy efficiency and temperature management. | Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas |
| 1999 | HPCA | Second Workshop on Computer Architecture Evaluation Using Commercial Workloads. | Russell M. Clapp, Ashwini K. Nanda, Josep Torrellas |
| 1999 | HPCA | Hardware for Speculative Parallelization of Partially-Parallel Loops in DSM Multiprocessors. | Ye Zhang, Lawrence Rauchwerger, Josep Torrellas |
| 1999 | ICCD | Detailed Characterization of a Quad Pentium Pro Server Running TPC-D. | Qiang Cao, Josep Torrellas, Pedro Trancoso, Josep Llus Larriba-Pey, Bob Knighten, Youjip Won |
| 1999 | ICCD | FlexRAM: Toward an Advanced Intelligent Memory System. | Yi Kang, Wei Huang, Seung-Moon Yoo, Diana Keen, Zhenzhou Ge, Vinh Vi Lam, Josep Torrellas, Pratap Pattnaik |
| 1999 | ICCD | Cache Optimization for Memory-Resident Decision Support Commercial Workloads. | Pedro Trancoso, Josep Torrellas |
| 1999 | ICPP | Compiler Support for Data Forwarding in Scalable Shared-Memory Multiprocessors. | David A. Koufaty, Josep Torrellas |
| 1999 | ICPP | Optimization of Instruction Fetch for Decision Support Workloads. | Alex Ramrez, Josep Llus Larriba-Pey, Carlos Navarro, Xavi Serrano, Mateo Valero, Josep Torrellas |
| 1999 | ICS | Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity. | Jos F. Martnez, Josep Torrellas, Jos Duato |
| 1999 | ICS | Software trace cache. | Alex Ramrez, Josep Llus Larriba-Pey, Carlos Navarro, Josep Torrellas, Mateo Valero |
| 1999 | SC | Scal-Tool: Pinpointing and Quantifying Scalability Bottlenecks in DSM Multiprocessors. | Josep Torrellas, Yan Solihin, Vinh Vi Lam |
| 1998 | HPCA | Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma. | Sujoy Basu, Josep Torrellas |
| 1998 | HPCA | Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors. | Ye Zhang, Lawrence Rauchwerger, Josep Torrellas |
| 1998 | ICIP | Use IRAM for Rasterization. | Yi Kang, Josep Torrellas, Thomas S. Huang |
| 1998 | ICPR | An IRAM architecture for image analysis and pattern recognition. | Yi Kang, Josep Torrellas, Thomas S. Huang |
| 1998 | ICS | Comparing Data Forwarding and Prefetching for Communication-induced Misses in Shared-memory MPs. | David A. Koufaty, Josep Torrellas |
| 1998 | ICS | Hardware and Software Support for Speculative Execution of Sequential Binaries on a Chip-multiprocessor. | Venkata Krishnan, Josep Torrellas |
| 1998 | WCAE | Computer architecture education at the University of Illinois. | Josep Torrellas |
| 1997 | HPCA | The Memory Performance of DSS Commercial Workloads in Shared-Memory Multiprocessors. | Pedro Trancoso, Josep Llus Larriba-Pey, Zheng Zhang, Josep Torrellas |
| 1997 | HPCA | Speeding up the Memory Hierarchy in Flat COMA Multiprocessors. | Liuxi Yang, Josep Torrellas |
| 1997 | HPCA | Reducing Remote Conflict Misses: NUMA with Remote Cache versus COMA. | Zheng Zhang, Josep Torrellas |
| 1996 | HPCA | Distance-Adaptive Update Protocols for Scalable Shared-Memory Multiprocessors. | Alain Raynaud, Zheng Zhang, Josep Torrellas |
| 1996 | HPCA | Improving the Data Cache Performance of Multiprocessor Operating Systems. | Chun Xia, Josep Torrellas |
| 1996 | ICCD | The Augmint multiprocessor simulation toolkit for Intel x86 architectures. | Anthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas |
| 1996 | ICPP | The Impact of Speeding up Critical Sections with Data Prefetching and Forwarding. | Pedro Trancoso, Josep Torrellas |
| 1996 | ISCA | Instruction Prefetching of Systems Codes with Layout Optimized for Reduced Cache Misses. | Chun Xia, Josep Torrellas |
| 1996 | ICS | Optimizing Primary Data Caches for Parallel Scientific Applications: The Pool Buffer Approach. | Liuxi Yang, Josep Torrellas |
| 1996 | WCAE | Computer architecture education at the University of Illinois: current status and some thoughts. | Josep Torrellas |
| 1995 | HPCA | Optimizing Instruction Cache Performance for Operating System Intensive Workloads. | Josep Torrellas, Chun Xia, Russell L. Daigle |
| 1995 | ISCA | Speeding Up Irregular Applications in Shared-Memory Multiprocessors: Memory Binding and Group Prefetching. | Zheng Zhang, Josep Torrellas |
| 1995 | ICS | Data Forwarding in Scalable Shared-Memory Multiprocessors. | David A. Koufaty, Xiangfeng Chen, David K. Poulsen, Josep Torrellas |
| 1994 | ICPP | Comparing the Performance of the DASH and CEDAR Multiprocessors. | Josep Torrellas, David A. Koufaty, David A. Padua |
| 1994 | SC | An efficient algorithm for the run-time parallelization of DOACROSS loops. | Ding-Kai Chen, Josep Torrellas, Pen-Chung Yew |
| 1994 | SC | The performance of the Cedar multistage switching network. | Josep Torrellas, Zheng Zhang |
| 1993 | SIGMETRICS | Benefits of Cache-Affinity Scheduling in Shared-Memory Multiprocessors: A Summary. | Josep Torrellas, Andrew Tucker, Anoop Gupta |
| 1992 | ASPLOS | Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System. | Josep Torrellas, Anoop Gupta, John L. Hennessy |
| 1990 | ICPP | Estimating the Performance Advantages of Relaxing Consistency in a Shared Memory Multiprocessor. | Josep Torrellas, John L. Hennessy |
| 1990 | ICPP | Share Data Placement Optimizations to Reduce Multiprocessor Cache Miss Rates. | Josep Torrellas, Monica S. Lam, John L. Hennessy |
| 1990 | SIGMETRICS | Analysis of Critical Architectural and Program Parameters in a Hierarchical Shared Memory Multiprocessor. | Josep Torrellas, John L. Hennessy, Thierry Weil |