| 2026 | ASPDAC | SOFA-H: Post-Synthesis Area Optimization via Functionally Encoded, Net-Driven Subgraph Mining and SAT-Based Hypercell Remapping. | Jimmy Y.-C. Lee, Yen-Ju Su, Jiun-Cheng Tsai, Aaron C.-W. Liang, Charles H.-P. Wen, Hsuan-Ming Huang |
| 2025 | ICCAD | CoP&R: Co-Optimizing Place-and-Route for Standard Cell Layout via MCTS and AllSAT. | Yen-Ju Su, Jiun-Cheng Tsai, Hsuan-Ming Huang, Aaron C.-W. Liang, Han-Ya Tsai, Wei-Min Hsu, Jen-Hang Yang, Charles H.-P. Wen |
| 2025 | ITC | Enhancing Timing Predictability in Automotive Electronics: Addressing Aging and Temperature Distributions. | Jeffery Y.-C. Chen, Jason W.-Y. Cheng, Aaron C.-W. Liang, Charles H.-P. Wen, Gung-Yu Pan, Hen-Ming Lin |
| 2024 | ICCAD | MAXCell: PPA-Directed Multi-Height Cell Layout Routing Optimization using Anytime MaXSAT with Constraint Learning. | Jiun-Cheng Tsai, Wei-Min Hsu, Yun-Ting Hsieh, Yu-Ju Li, Wei Huang, C. N. Ho, Hsuan-Ming Huang, Jen-Hang Yang, Heng-Liang Huang, Aaron C.-W. Liang, Charles H.-P. Wen |
| 2023 | ITC | Preventing Single-Event Double-Node Upsets by Engineering Change Order in Latch Designs. | Sam M.-H. Hsiao, Amy H.-Y. Tsai, Lowry P.-T. Wang, Aaron C.-W. Liang, Charles H.-P. Wen, Herming Chiueh |
| 2022 | ITC | Existence of Single-Event Double-Node Upsets (SEDU) in Radiation-Hardened Latches for Sub-65nm CMOS Technologies. | Sam M.-H. Hsiao, Lowry P.-T. Wang, Aaron C.-W. Liang, Charles H.-P. Wen |
| 2021 | DATE | Generating Layouts of Standard Cells by Implicit Learning on Design Rules for Advanced Processes. | Aaron C.-W. Liang, Hsuan-Ming Huang, Charles H.-P. Wen |
| 2019 | ITC | FAE: Autoencoder-Based Failure Binning of RTL Designs for Verification and Debugging. | Cheng-Hsien Shen, Aaron C.-W. Liang, Charles C.-H. Hsu, Charles H.-P. Wen |