| 2013 | VLSID | Formal Verification of Hardware / Software Power Management Strategies. | Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal, Subhankar Mukherjee |
| 2011 | ICDCN | An Algorithm for Traffic Grooming in WDM Mesh Networks Using Dynamic Path Selection Strategy. | Sukanta Bhattacharya, Tanmay De, Ajit Pal |
| 2010 | DAC | Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent. | Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha |
| 2010 | ICDCN | Credit Reputation Propagation: A Strategy to Curb Free-Riding in a Large BitTorrent Swarm. | Suman Paul, Subrata Nandi, Ajit Pal |
| 2009 | VLSID | Synthesis & Testing for Low Power. | Ajit Pal, Santanu Chattopadhyay |
| 2008 | DSD | Why to Use Dual-Vt, If Single-Vt Serves the Purpose Better under Process Parameter Variations? | Sudip Roy, Ajit Pal |
| 2008 | ICDCN | Routing and Wavelength Assignment in All Optical Networks Based on Clique Partitioning. | Tanmay De, Ajit Pal, Indranil Sengupta |
| 2007 | VLSID | Low Power Sensor Node for a Wireless Sensor Network. | Akepati Sravan, Sujan Kundu, Ajit Pal |
| 2004 | VLSID | Energy-aware Logic Synthesis and Technology Mapping for MUX-based FPGAs. | Maitrali Marik, Ajit Pal |
| 2004 | VLSID | Synthesis of Low Power High Performance Dual-VT PTL Circuits. | Debasis Samanta, Ajit Pal |
| 2003 | ASPDAC | Synthesis of high performance low power PTL circuits. | Debasis Samanta, M. C. Dharmadeep, Ajit Pal |
| 2003 | VLSID | Synthesis of Dual-VT Dynamic CMOS Circuits. | Debasis Samanta, Ajit Pal |
| 2002 | VLSID | Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. | Debasis Samanta, Ajit Pal |
| 2002 | VLSID | Synthesis of High Performance Low Power Dynamic CMOS Circuits. | Debasis Samanta, Nishant Sinha, Ajit Pal |
| 2001 | VLSID | Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits. | Nikhil Tripathi, Amit M. Bhosle, Debasis Samanta, Ajit Pal |
| 1999 | HiPC | Deadline Assignment in Multiprocessor-Based Fault-Tolerant Systems. | Sharath Kumar Kodase, N. V. Satyanarayana, Ajit Pal, Rajib Mall |
| 1997 | VLSID | An Algorithm for Finding a Non-Trivial Lower Bound for Channel Routing. | Rajat Kumar Pal, Sudebkumar Prasant Pal, Ajit Pal |
| 1995 | VLSID | A general graph theoretic framework for multi-layer channel routing. | Rajat Kumar Pal, A. K. Datta, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal |
| 1995 | VLSID | Computing area and wire length efficient routes for channels. | Rajat Kumar Pal, Sudebkumar Prasant Pal, M. M. Das, Ajit Pal |
| 1993 | VLSID | NP-Completeness of Multi-Layer No-Dogleg Channel Routing and an Efficient Heuristic. | Rajat Kumar Pal, Sudebkumar Prasant Pal, Ajit Pal, Alak K. Dutta |
| 1992 | VLSID | An Efficient Graph-Theoretic Algorithm for Three-Layer Channel Routing. | Rajat Kumar Pal, Ajit Pal |