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Alberto Ros

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

58

Venues

19

Active years

2005–2026

Best venue rank

A*

Where they publish

Papers

58 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPLOSICARUS: Criticality and Reuse based Instruction Caching for Datacenter Applications.Vedant Kalbande, Hrishikesh Jedhe Deshmukh, Alberto Ros, Biswabandan Panda
2026CGOEnabling Automatic Compiler-Driven Vectorization of Transformers.Shreya Alladi, Alberto Ros, Alexandra Jimborean
2026CGOCompiler-Assisted Instruction Fusion.Ravikiran Ravindranath Reddy, Sawan Singh, Arthur Perais, Alberto Ros, Alexandra Jimborean
2026DATEOptimize edge AI processing through innovative compilation techniques.Shreya Alladi, Alexandre Lopoukhine, Georgios Alexandris, Andrea Nardi-Dei, Ravikiran Ravindranath Reddy, Christos P. Lamprakos, Panagiotis Chaidos, Alexis Maras, Alberto Ros, Tobias Grosser, Sotirios Xydis, Dimitrios Soudris, Marc Geilen, Sander Stuijk, Henk Corporaal, Alexandra Jimborean
2026ISPASSCorrect Wrong Path Simulation.Chrysanthos Pepi, Krishnam Tibrewala, Bhargav Reddy Godala, Sankara Prasad Ramesh, Alberto Ros, Daniel A. Jimnez, Gilles A. Pokam, Paul V. Gratz
2025HPCANo Rush in Executing Atomic Instructions.Ashkan Asgharzadeh, Josu Feliu, Manuel E. Acacio, Stefanos Kaxiras, Alberto Ros
2025HPCAMascot: Predicting Memory Dependencies and Opportunities for Speculative Memory Bypassing.Karl H. Mose, Sebastian S. Kim, Alberto Ros, Timothy M. Jones, Robert D. Mullins
2024ASPLOSBounding Speculative Execution of Atomic Regions to a Single Retry.Eduardo Jos Gmez-Hernndez, Juan M. Cebrian, Stefanos Kaxiras, Alberto Ros
2024HPCAEffective Context-Sensitive Memory Dependence Prediction.Sebastian S. Kim, Alberto Ros
2024ICCDHardware Cache Locking for All Memory Updates.Ashkan Asgharzadeh, Eduardo Jos Gmez-Hernndez, Juan M. Cebrian, Stefanos Kaxiras, Alberto Ros
2024ISCAAlternate Path μ-op Cache Prefetching.Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros
2024MICROTemporarily Unauthorized Stores: Write First, Ask for Permission Later.Juan M. Cebrian, Magnus Jahre, Alberto Ros
2024MICROSecure Prefetching for Secure Cache Systems.Sumon Nath, Agustn Navarro-Torres, Alberto Ros, Biswabandan Panda
2024MICROChaining Transactions for Effective Concurrency Management in Hardware Transactional Memory.Vctor Nicols-Conesa, J. Rubn Titos Gil, Ricardo Fernndez-Pascual, Manuel E. Acacio, Alberto Ros
2023ISPASSMBPlib: Modular Branch Prediction Library.Emilio Domnguez-Snchez, Alberto Ros
2022ICCDComposite Instruction Prefetching.Gino Chacon, Elba Garza, Alexandra Jimborean, Alberto Ros, Paul V. Gratz, Daniel A. Jimnez, Samira Mirbagher Ajorpaz
2022ISCAFree atomics: hardware atomic operations without fences.Ashkan Asgharzadeh, Juan M. Cebrian, Arthur Perais, Stefanos Kaxiras, Alberto Ros
2022MICROBerti: an Accurate Local-Delta Data Prefetcher.Agustn Navarro-Torres, Biswabandan Panda, Jess Alastruey-Bened, Pablo Ibez, Vctor Vials Yfera, Alberto Ros
2022MICROExploring Instruction Fusion Opportunities in General Purpose Processors.Sawan Singh, Arthur Perais, Alexandra Jimborean, Alberto Ros
2022PDPAnalysis of the Interactions Between ILP and TLP With Hardware Transactional Memory.Vctor Nicols-Conesa, J. Rubn Titos Gil, Ricardo Fernndez-Pascual, Alberto Ros, Manuel E. Acacio
2021HPCATSOPER: Efficient Coherence-Based Strict Persistency.Per Ekemark, Yuan Yao, Alberto Ros, Konstantinos Sagonas, Stefanos Kaxiras
2021ISCAA Cost-Effective Entangling Prefetcher for Instructions.Alberto Ros, Alexandra Jimborean
2021ISPASSSplash-4: Improving Scalability with Lock-Free Constructs.Eduardo Jos Gmez-Hernndez, Ruixiang Shao, Christos Sakalis, Stefanos Kaxiras, Alberto Ros
2021MICROITSLF: Inter-Thread Store-to-Load Forwardingin Simultaneous Multithreading.Josu Feliu, Alberto Ros, Manuel E. Acacio, Stefanos Kaxiras
2021MICROEfficient, Distributed, and Non-Speculative Multi-Address Atomic Operations.Eduardo Jos Gmez-Hernndez, Juan M. Cebrian, J. Rubn Titos Gil, Stefanos Kaxiras, Alberto Ros
2020MICROBoosting Store Buffer Efficiency with Store-Prefetch Bursts.Juan M. Cebrian, Stefanos Kaxiras, Alberto Ros
2020MICROSpeculative Enforcement of Store Atomicity.Alberto Ros, Stefanos Kaxiras
2020PDPTLB-based Block-Grain Classification of Private Data.Bhargavi R. Upadhyay, Alberto Ros, Murty NS
2019ISCAFilter caching for free: the untapped potential of the store-buffer.Ricardo Alves, Alberto Ros, David Black-Schaffer, Stefanos Kaxiras
2019ISCAEfficient invisible speculative execution through selective delay and value prediction.Christos Sakalis, Stefanos Kaxiras, Alberto Ros, Alexandra Jimborean, Magnus Sjlander
2018ISCANon-Speculative Store Coalescing in Total Store Order.Alberto Ros, Stefanos Kaxiras
2018MICROThe Superfluous Load Queue.Alberto Ros, Stefanos Kaxiras
2017CGOAutomatic detection of extended data-race-free regions.Alexandra Jimborean, Jonatan Waern, Per Ekemark, Stefanos Kaxiras, Alberto Ros
2017ISCANon-Speculative Load-Load Reordering in TSO.Alberto Ros, Trevor E. Carlson, Mehdi Alipour, Stefanos Kaxiras
2017ICSWay-combining directory: an adaptive and scalable low-cost coherence directory.J. Rubn Titos Gil, Antonio Flores, Ricardo Fernndez-Pascual, Alberto Ros, Manuel E. Acacio
2016FORTEFencing Programs with Self-Invalidation and Self-Downgrade.Parosh Aziz Abdulla, Mohamed Faouzi Atig, Stefanos Kaxiras, Carl Leonardsson, Alberto Ros, Yunyun Zhu
2016HiPCA Directory Cache with Dynamic Private-Shared Partitioning.Joan J. Valls, Mara Engracia Gmez, Alberto Ros, Julio Sahuquillo
2016ICSTokenTLB: A Token-Based Page Classification Approach.Albert Esteve, Alberto Ros, Antonio Robles, Mara Engracia Gmez, Jos Duato
2016ISPASSSplash-3: A properly synchronized benchmark suite for contemporary research.Christos Sakalis, Carl Leonardsson, Stefanos Kaxiras, Alberto Ros
2016MICRORacer: TSO consistency via race detection.Alberto Ros, Stefanos Kaxiras
2015HPCAHierarchical private/shared classification: The key to simple and efficient coherence for clustered cache hierarchies.Alberto Ros, Mahdad Davari, Stefanos Kaxiras
2015HPDCTurning Centralized Coherence and Distributed Critical-Section Execution on their Head: A New Approach for Scalable Distributed Shared Memory.Stefanos Kaxiras, David Klaftenegger, Magnus Norgren, Alberto Ros, Konstantinos Sagonas
2015ISCACallback: efficient synchronization without invalidation with a directory just for spin-waiting.Alberto Ros, Stefanos Kaxiras
2015PDPThe Tag Filter Cache: An Energy-Efficient Approach.Joan J. Valls, Julio Sahuquillo, Alberto Ros, Mara Engracia Gmez
2014EuroParCharacterization of a List-Based Directory Cache Coherence Protocol for Manycore CMPs.Ricardo Fernndez-Pascual, Alberto Ros, Manuel E. Acacio
2013ICCSEfficient Dir0B Cache Coherency for Many-Core CMPs.Jos L. Abelln, Alberto Ros, Juan Fernndez, Manuel E. Acacio
2013ICPPTemporal-Aware Mechanism to Detect Private Data in Chip Multiprocessors.Alberto Ros, Blas Cuesta, Mara Engracia Gmez, Antonio Robles, Jos Duato
2013ISCAA new perspective for efficient virtual-cache coherence.Stefanos Kaxiras, Alberto Ros
2012ISLPEDASCIB: adaptive selection of cache indexing bits for removing conflict misses.Alberto Ros, Polychronis Xekalakis, Marcelo Cintra, Manuel E. Acacio, Jos M. Garca
2012ISPACache Miss Characterization in Hierarchical Large-Scale Cache-Coherent Systems.Alberto Ros, Blas Cuesta, Mara Engracia Gmez, Antonio Robles, Jos Duato
2012SBAC-PADUsing Heterogeneous Networks to Improve Energy Efficiency in Direct Coherence Protocols for Many-Core CMPs.Alberto Ros, Ricardo Fernndez-Pascual, Manuel E. Acacio
2011ICPPEnergy-Efficient Cache Coherence Protocols in Chip-Multiprocessors for Server Consolidation.Antonio Garca-Guirado, Ricardo Fernndez-Pascual, Alberto Ros, Jos M. Garca
2011ISCAIncreasing the effectiveness of directory caches by deactivating coherence for private memory blocks.Blas Cuesta, Alberto Ros, Mara Engracia Gmez, Antonio Robles, Jos Duato
2010EuroParEvaluation of Low-Overhead Organizations for the Directory in Future Many-Core CMPs.Alberto Ros, Manuel E. Acacio
2010HiPCEMCAlberto Ros, Blas Cuesta, Ricardo Fernndez-Pascual, Mara Engracia Gmez, Manuel E. Acacio, Antonio Robles, Jos M. Garca, Jos Duato
2009HiPCDistance-aware round-robin mapping for large NUCA caches.Alberto Ros, Marcelo Cintra, Manuel E. Acacio, Jos M. Garca
2007HiPCDirect Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors.Alberto Ros, Manuel E. Acacio, Jos M. Garca
2005EuroParA Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors.Alberto Ros, Manuel E. Acacio, Jos M. Garca