Alexander Saldanha
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
22
Venues
4
Active years
1988–2000
Best venue rank
A*
Where they publish
Papers
22 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2000 | VLSID | Timing Analysis with Implicitly Specified False Paths. | Eugene Goldberg, Alexander Saldanha |
| 1999 | ICCAD | A methodology for correct-by-construction latency insensitive design. | Luca P. Carloni, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
| 1999 | ICCAD | Functional timing optimization. | Alexander Saldanha |
| 1997 | ICCAD | Trace driven logic synthesis - application to power minimization. | Luca P. Carloni, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
| 1997 | ICCAD | Partial scan delay fault testing of asynchronous circuits. | Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin |
| 1997 | ICCAD | Approximate timing analysis of combinational circuits under the XBD0 model. | Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, Robert K. Brayton |
| 1996 | DAC | Verification of Electronic Systems. | Alberto L. Sangiovanni-Vincentelli, Patrick C. McGeer, Alexander Saldanha |
| 1996 | ICCAD | Compact and complete test set generation for multiple stuck-faults. | Alok Agrawal, Alexander Saldanha, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli |
| 1995 | CAV | Supervisory Control of Finite State Machines. | Adnan Aziz, Felice Balarin, Robert K. Brayton, Marika Domenica Di Benedetto, Alexander Saldanha |
| 1995 | DAC | Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool. | Luciano Lavagno, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
| 1995 | ICCAD | Fast discrete function evaluation using decision diagrams. | Patrick C. McGeer, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli, Patrick Scaglia |
| 1995 | VLSID | Functional clock schedule optimization. | Alexander Saldanha, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1994 | DAC | Performance Optimization Using Exact Sensitization. | Alexander Saldanha, Heather Harkness, Patrick C. McGeer, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1993 | DAC | Delay Fault Coverage and Performance Tradeoffs. | William K. C. Lam, Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | DAC | Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation. | Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | DAC | Circuit Structure Relations to Redundancy and Delay: The KMS Algorithm Revisited. | Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | DAC | A Framework for Satisfying Input and Output Encoding Constraints. | Alexander Saldanha, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | ICCAD | Timing Analysis and Delay-Fault Test Generation using Path-Recursive Functions. | Patrick C. McGeer, Alexander Saldanha, Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1990 | DAC | Is Redundancy Necessary to Reduce Delay. | Kurt Keutzer, Sharad Malik, Alexander Saldanha |
| 1990 | ICCAD | Timing Optimization with Testability Considerations. | Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Kwang-Ting Cheng |
| 1989 | DAC | Multi-level Logic Simplification Using Don't Cares and Filters. | Alexander Saldanha, Albert R. Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1988 | ICCAD | PLA optimization using output encoding. | Alexander Saldanha, Randy H. Katz |