Allon Adir
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
11
Venues
5
Active years
2005–2022
Best venue rank
A*
Where they publish
Papers
11 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | ACNS | Privacy-Preserving Record Linkage Using Local Sensitive Hash and Private Set Intersection. | Allon Adir, Ehud Aharoni, Nir Drucker, Eyal Kushnir, Ramy Masalha, Michael Mirkin, Omri Soceanu |
| 2017 | ICDE | Anomaly Detection in Large Databases Using Behavioral Patterning. | Hanna Mazzawi, Gal Dalal, David Rozenblat, Liat Ein-Dor, Matan Ninio, Ofer Lavi, Allon Adir, Ehud Aharoni, Einat Kermany |
| 2017 | SYSTOR | Big data analysis of cloud storage logs using spark. | Shelly Garion, Hillel Kolodner, Allon Adir, Ehud Aharoni, Lev Greenberg |
| 2014 | DAC | Using a High-Level Test Generation Expert System for Testing In-Car Networks. | Allon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman |
| 2014 | DAC | Verification of Transactional Memory in POWER8. | Allon Adir, Dave Goodman, Daniel Hershcovich, Oz Hershkovitz, Bryan G. Hickerson, Karen Holtz, Wisam Kadry, Anatoly Koyfman, John M. Ludden, Charles Meissner, Amir Nahir, Randall R. Pratt, Mike Schiffli, Brett St. Onge, Brian W. Thompto, Elena Tsanko, Avi Ziv |
| 2011 | DAC | Threadmill: a post-silicon exerciser for multi-threaded processors. | Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv |
| 2011 | DAC | Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor. | Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann |
| 2011 | DATE | A unified methodology for pre-silicon verification and post-silicon validation. | Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann |
| 2007 | DAC | A Framework for the Validation of Processor Architecture Compliance. | Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled |
| 2005 | DAC | A generic micro-architectural test plan approach for microprocessor verification. | Allon Adir, Hezi Azatchi, Eyal Bin, Ofer Peled, Kirill Shoikhet |
| 2005 | DAC | VLIW: a case study of parallelism verification. | Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy |