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Alok Naugarhiya

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2024–2024

Best venue rank

National

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2024VLSIDLow Loss Gate Engineered Superjunction Insulated Gate Bipolar Transistor for High Speed Application.Shriharsh Prasad Behera, Mahesh Vaidya, Alok Naugarhiya