| 2025 | GLOBECOM | Multi-Carrier MIMO Cognitive BackCom: Adaptive Processing with Temporal Combining Improved Data Stream Decoding. | Richard Boateng Nti, Derek Kwaku Pobi Asiedu, Amer Baghdadi, Samir Saoudi, Ji-Hoon Yun, Sbastien Roy |
| 2023 | PIMRC | Novel transmission technique based on intentional overlapping for spectral efficiency enhancement in multicarrier systems. | Fatima Hamdar, Jrmy Nadal, Charbel Abdel Nour, Amer Baghdadi |
| 2022 | VTC | Overlap-Save FBMC receivers for massive MIMO systems under channel impairments. | Fatima Hamdar, Jrmy Nadal, Charbel Abdel Nour, Amer Baghdadi |
| 2022 | RSP | Marine Objects Detection Using Deep Learning on Embedded Edge Devices. | Dominique Heller, Mostafa Rizk, R. Douguet, Amer Baghdadi, Jean-Philippe Diguet |
| 2022 | RSP | Enhancing embedded AI-based object detection using multi-view approach. | Zijie Ning, Mostafa Rizk, Amer Baghdadi, Jean-Philippe Diguet |
| 2020 | ISCAS | Memristor Overwrite Logic (MOL) for Energy-Efficient In-Memory DNN. | Khaled Alhaj Ali, Mostafa Rizk, Amer Baghdadi, Jean-Philippe Diguet, Jalal Jomaah |
| 2020 | RSP | FPGA based design and prototyping of efficient 5G QC-LDPC channel decoding. | Jrmy Nadal, Amer Baghdadi |
| 2018 | RSP | Rapid Prototyping of Parameterized Rotated and Cyclic Q Delayed Constellations Demapper. | Muhammad Waqas, Atif Raza Jafri, Amer Baghdadi, Muhammad Najam-ul-Islam |
| 2015 | RSP | Caasper: providing accessible FPGA-acceleration over the network. | Valentin Mena Morales, Yahia Brakni, Pierre-Henri Horrein, Amer Baghdadi |
| 2014 | DATE | Energy-efficient FPGA implementation for binomial option pricing using OpenCL. | Valentin Mena Morales, Pierre-Henri Horrein, Amer Baghdadi, Erik Hochapfel, Sandrine Vaton |
| 2014 | RSP | Design and prototyping flow of NISC-based flexible MIMO turbo-equalizer. | Mostafa Rizk, Amer Baghdadi, Michel Jzquel, Yasser Mohanna, Youssef Atat |
| 2013 | DATE | Parameterized area-efficient multi-standard turbo decoder. | Purushotham Murugappa, Amer Baghdadi, Michel Jzquel |
| 2013 | DATE | Statically-scheduled application-specific processor design: a case-study on MMSE MIMO equalization. | Mostafa Rizk, Amer Baghdadi, Michel Jzquel, Yasser Mohana, Youssef Atat |
| 2013 | DSD | A Joint Communication and Application Simulator for NoC-Based Custom SoCs: LDPC and Turbo Codes Parallel Decoding Case Study. | Carlo Condo, Amer Baghdadi, Guido Masera |
| 2013 | DSD | Stopping-Free Dynamic Configuration of a Multi-ASIP Turbo Decoder. | Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hbner, Jean-Philippe Diguet |
| 2013 | ISCAS | Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder. | Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hbner |
| 2013 | RSP | Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes. | Purushotham Murugappa, Vianney Lapotre, Amer Baghdadi, Michel Jzquel |
| 2012 | RSP | FPGA prototyping and performance evaluation of multi-standard Turbo/LDPC Encoding and Decoding. | Purushotham Murugappa, Jean-Noel Bazin, Amer Baghdadi, Michel Jzquel |
| 2011 | DATE | A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding. | Purushotham Murugappa, Rachid Al-Khayat, Amer Baghdadi, Michel Jzquel |
| 2011 | DATE | A low complexity stopping criterion for reducing power consumption in turbo decoders. | Pallavi Reddy, Fabien Clermidy, Amer Baghdadi, Michel Jzquel |
| 2011 | RSP | Area and throughput optimized ASIP for multi-standard turbo decoding. | Rachid Al-Khayat, Purushotham Murugappa, Amer Baghdadi, Michel Jzquel |
| 2011 | SOFTCOM | Reducing the number of iterations in iterative demodulation with turbo decoding. | Salim Haddad, Amer Baghdadi, Michel Jzquel |
| 2010 | ISCAS | Rapid design and prototyping of universal soft demapper. | Atif Raza Jafri, Amer Baghdadi, Michel Jzquel |
| 2009 | DATE | ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications. | Atif Raza Jafri, Daoud Karakolah, Amer Baghdadi, Michel Jzquel |
| 2009 | DSD | Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm. | Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jzquel |
| 2009 | RSP | High-Level System Modeling for Rapid HW/SW Architecture Exploration. | Chafic Jaber, Andreas Kanstein, Ludovic Apvrille, Amer Baghdadi, Patricia Le Moenner, Renaud Pacalet |
| 2009 | RSP | Rapid Prototyping of ASIP-based Flexible MMSE-IC Linear Equalizer. | Atif Raza Jafri, Amer Baghdadi, Michel Jzquel |
| 2009 | RSP | FPGA-based Radar Signal Processing for Automotive Driver Assistance System. | Jean Saad, Amer Baghdadi, Frantz Bodereau |
| 2008 | DAC | Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder. | Hazem Moussa, Amer Baghdadi, Michel Jzquel |
| 2008 | ISCAS | Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder. | Hazem Moussa, Amer Baghdadi, Michel Jzquel |
| 2008 | RSP | From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding. | Olivier Muller, Amer Baghdadi, Michel Jzquel |
| 2007 | DATE | Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding. | Hazem Moussa, Olivier Muller, Amer Baghdadi, Michel Jzquel |
| 2006 | DATE | ASIP-based multiprocessor SoC design for simple and double binary turbo decoding. | Olivier Muller, Amer Baghdadi, Michel Jzquel |
| 2006 | GLOBECOM | On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference. | Olivier Muller, Amer Baghdadi, Michel Jzquel |
| 2004 | DAC | An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. | Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya |
| 2004 | RSP | An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. | Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesrio, Ahmed Amine Jerraya |
| 2003 | RSP | Embedded Application Prototyping on a Communication-Restricted Reconfigurable. | Arif Sasongko, Amer Baghdadi, Frdric Rousseau, Ahmed Amine Jerraya |
| 2002 | DAC | Component-based design approach for multicore SoCs. | Wander O. Cesrio, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava |
| 2001 | DAC | Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. | Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed Amine Jerraya |
| 2001 | DATE | An efficient architecture model for systematic design of application-specific multiprocessor SoC. | Amer Baghdadi, Damien Lyonnard, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya |
| 2000 | RSP | Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesrio, T. Roudier, Ahmed Amine Jerraya |