| 2025 | Exploring Cache Policies on FPGA-Accelerated Simulations: Tradeoffs Between Usability and Simulation Speed. | Soraya Mobaraki, Thierry Gil, Lionel Torres, David Novo |
| 2025 | Evaluation Tool for Stencil Application Memory Usage. | Kilian McGovern, Frdric Rousseau, Henri-Pierre Charles |
| 2025 | Dynamic Asynchronous Controller for Integrated Photonic Networks: Introducing CLAP. | Felipe Gohring de Magalhaes |
| 2025 | Control-flow Aware MLIR Tracing. | Gatan Lounes, Robin Gerzaguet, Matthieu Gautier |
| 2025 | RISC-B: Hardware Blocks for the design of RISC-V-based SoCs. | Carlos Andres Lara-Nino |
| 2025 | Extending Instruction Set Simulators with ML-based Performance Models: Application to QEMU. | Fatma Jebali, Caaliph Andriamisaina |
| 2025 | CART: Combined AUTOSAR AP and ROS 2 Tracing Framework. | Ryudai Iwakami, Hiroyuki Hanyu, Tasuku Ishigooka, Takuya Azumi |
| 2025 | A Prototyping Framework for P4-Programmable Traffic Managers. | Karl La Grassa, Andr Bliveau, Mathieu Lonardon, Jean-Pierre David, Matthieu Arzel, Yvon Savaria |
| 2025 | From Concept to FPGA Prototype: System Design and Verification for the Control of 3-Phase Permanent Magnet Synchronous Motors. | Maxime Gras-Chevalier, Christophe Jgo, Camille Leroux, Franck Guillemard |
| 2025 | Early Detection of Unsupported Compilations during Prototyping in a Template-based Just-in-Time Compiler. | Michael C. Goodyear, Scott Ryan Young, Marius Pirvu, Harpreet Kaur, Kenneth B. Kent |
| 2025 | Lightweight 1D UNet-CPCA Regression Model for Energy-Efficient Blood Pressure Estimation from Raw PPG Signals. | Amir Arjomand, Kenneth B. Kent, Georgiy Krylov |
| 2025 | ADAM: ADAptive Microcontroller Platform for Edge AI Systems. | Felipe Paiva Alencar, Aymen Romdhane, Bruno Lovison Franco, Yann Guilhot, Jonathan Miquel, Theo Soriano, David Novo, Pascal Benoit |
| 2024 | Advancing Formal Verification: Fine-Tuning LLMs for Translating Natural Language Requirements to CTL Specifications. | Rim Zrelli, Henrique Amaral Misson, Maroua Ben Attia, Felipe Gohring de Magalhaes, Abdo Shabah, Gabriela Nicolescu |
| 2024 | Page size exploration for RISC-V systems: the case for HPC. | Eduardo Tomasi, Csar Fuguet, Christian Fabre, Frdric Ptrot |
| 2024 | Non-interfering On-line and In-field SoC Testing. | Tobias Strauch |
| 2024 | Transaction Level Hierarchy Guided and Functional Coverage Driven Deductive Formal Verification. | Tobias Strauch |
| 2024 | Cost-Effective Cyber-Physical System Prototype for Precision Agriculture with a Focus on Crop Growth. | Pawan Kumar, Hokeun Kim |
| 2024 | Enhancing the VTR Flow: Integration of ABC9 via Yosys for Better Technology Mapping and Optimization. | Navid Jafarof, Kenneth B. Kent |
| 2024 | Temporal Staging for Correct-by-Construction Cryptographic Hardware. | Yakir Forman, William L. Harrison |
| 2024 | Invited Paper-Circuit Partitioning with Reinforcement Learning and Edge-Based Initialization. | Ka Chuen Cheng, Umair F. Siddiqi, Gary Grwal, Shawki M. Areibi |
| 2024 | Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5. | Muhammad Awais, Maria Mushtaq, Lirida Naviner, Florent Bruguier, Jawad Haj-Yahya, Pascal Benoit |
| 2023 | MRPHS: A Verilog RTL to C++ Model Compiler Using Intermediate Representations for Object-oriented Model-driven Prototyping. | Tobias Strauch |
| 2023 | Security assessment of a commercial router using physical access: a case study. | Colin Stephenne, Felipe Gohring de Magalhaes, Frdric Cuppens, Jean-Yves Ouattara, Militza Jean, Jose Fernandez, Gabriela Nicolescu |
| 2023 | Fast Compiler Optimization Flag Selection. | Melih Peker, Ozcan Ozturk |
| 2023 | Fast and Accurate Virtual Prototyping of an NPU with Analytical Memory Modeling. | Choonghoon Park, Hyunsu Moh, Jimin Lee, Changjae Yi, Soonhoi Ha |