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Kenneth B. Kent

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

65

Venues

17

Active years

2000–2026

Best venue rank

C

Where they publish

Papers

65 indexed papers, newest first.

YearVenueTitleAuthors
2026AIMEExpertoRhythm: Morphology-Aware Learning for Waveform Reconstruction and Cuffless Blood Pressure Estimation from Single-Channel PPG.Amir Arjomand, Kenneth B. Kent, Georgiy Krylov
2025ECMSDGSim: A Scalable Framework For Simulating Energy Consumption Of Household Appliances.Bhavani Sai Prasad Addala, Mohammad Mehabadi Mohammadi, Kenneth B. Kent
2025PSTComparing Client- & Server-Side AEAD Encryption in Software-Defined Storage Systems.David Mohren, Minh Truong, Brett Kelly, Kenneth B. Kent
2025RSPLightweight 1D UNet-CPCA Regression Model for Energy-Efficient Blood Pressure Estimation from Raw PPG Signals.Amir Arjomand, Kenneth B. Kent, Georgiy Krylov
2025RSPEarly Detection of Unsupported Compilations during Prototyping in a Template-based Just-in-Time Compiler.Michael C. Goodyear, Scott Ryan Young, Marius Pirvu, Harpreet Kaur, Kenneth B. Kent
2025SSDBMFALCON: FPGA Accelerated Lightweight Updatable Learned Index.Geetesh More, Suprio Ray, Kenneth B. Kent
2024FCCMLearned Index Acceleration with FPGAs: A SMART Approach.Geetesh More, Suprio Ray, Kenneth B. Kent
2024RSPEnhancing the VTR Flow: Integration of ABC9 via Yosys for Better Technology Mapping and Optimization.Navid Jafarof, Kenneth B. Kent
2023RSPExtending Memory Compatibility with Yosys Front-End in VTR Flow.Alireza Azadi, Amir Arjomand, Kenneth B. Kent
2023RSPThe Impact of Heterogeneous Logic on Adders and Multipliers in VTR.Navid Jafarof, Kenneth B. Kent
2022FCCMOdin-II Partial Technology Mapping for Yosys Coarse-grained Netlists in VTR.Seyed Alireza Damghani, Kenneth B. Kent
2022FPGAYosys+Odin-II: The Odin-II Partial Mapper with Yosys Coarse-grained Netlists in VTR.Seyed Alireza Damghani, Kenneth B. Kent
2022RSPMachine Learning-Based Hard/Soft Logic Trade-offs in VTR.Ritwik Sinha, Seyed Alireza Damghani, Kenneth B. Kent
2021FPLKoios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research.Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, Lizy K. John
2021IC2EEnergy and Runtime Performance Optimization of Node.js Web Requests.Maria Patrou, Kenneth B. Kent, Joran Siu, Michael Dawson
2021RSPHeterogeneous Logic Implementation for Adders in VTR.Harpreet Kaur, Georgiy Krylov, Seyed Alireza Damghani, Kenneth B. Kent
2020DSDHard and Soft Logic Trade-offs for Multipliers in VTR.Georgiy Krylov, Jean-Philippe Legault, Kenneth B. Kent
2020RSPDesired Footprint by Technology Mapping Modification using a Genetic Algorithm in Odin II.Seyed Alireza Damghani, Jean-Philippe Legault, Kenneth B. Kent
2019DSDImproving Digital Circuit Simulation with Batch-Parallel Logic Evaluation.Maria Patrou, Jean-Philippe Legault, Aaron Graham, Kenneth B. Kent
2019MDMToward Efficient Processing of Spatio-Temporal Workloads in a Distributed In-Memory System.Puya Memarzia, Maria Patrou, Md. Mahbub Alam, Suprio Ray, Virendra C. Bhavsar, Kenneth B. Kent
2019PDPScaling Parallelism Under CPU - Intensive Loads in Node.js.Maria Patrou, Kenneth B. Kent, Michael Dawson
2019RSPVerilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II.Scott Ryan Young, Alexandrea Demmings, Nasrin Eshraghi Ivari, Jean-Philippe Legault, Kenneth B. Kent
2018RSPTowards Trainable Synthesis for Optimized Circuit Deployment on FPGA.Jean-Philippe Legault, Panagiotis Patros, Kenneth B. Kent
2017CLUSTERDynamically Compiled Artifact Sharing for Clouds.Panagiotis Patros, Dayal Dilli, Kenneth B. Kent, Michael Dawson
2017CLUSTERInvestigating the Effect of Garbage Collection on Service Level Objectives of Clouds.Panagiotis Patros, Kenneth B. Kent, Michael Dawson
2017PDPA Region-Based Approach to Pipeline Parallelism in Java Programs on Multicores.Yang Wang, Kenneth B. Kent
2017RSPSimulation-based circuit-activity estimation for FPGAs containing hard blocks.Sean Seeley, Vidya Sankaranaryanan, Zack Deveau, Panagiotis Patros, Kenneth B. Kent
2016CLUSTERA Low Disk-Bound Transaction Logging System for In-memory Distributed Data Stores.Dayal Dilli, Kenneth B. Kent, Yang Wang, Cheng-Zhong Xu
2016SACUsing field access frequency to optimize layout of objects in the JVM.Taees Eimouri, Kenneth B. Kent, Aleksandar Micic, Karl Taylor
2016RSPAutomatic detection and elision of reset sub-circuits.Panagiotis Patros, Kenneth B. Kent
2015SCSJM: an SCM-based journaling mechanism with write reduction for file systems.Lingfang Zeng, Binbing Hou, Dan Feng, Kenneth B. Kent
2015RSPHard block reduction and synthesis improvements in Odin II.Bo Yan, Kenneth B. Kent
2014CloudComMonetary-and-QoS Aware Replica Placements in Cloud-Based Storage Systems.Lingfang Zeng, Shijie Xu, Yang Wang, Xiang Cui, Tan Wee Kiat, David Bremner, Kenneth B. Kent
2014FCCMOn Hard Adders and Carry Chains in FPGAs.Jason Luu, Conor McCullough, Sen Wang, Safeen Huda, Bo Yan, Charles Chiasson, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz
2014RSPSystem-on-chip processor using different FPGA architectures in the VTR CAD flow.Jingjing Li, Konstantin Nasartschuk, Kenneth B. Kent
2013RSPVisual exploration of changing FPGA architectures in the VTR project.Konstantin Nasartschuk, Rainer Herpers, Kenneth B. Kent
2012DSDFPGA Based Real-Time Tracking Approach with Validation of Precision and Performance.Alexander Bochem, Kenneth B. Kent, Rainer Herpers
2012DSDAnalyzing Bus Load Data Using an FPGA and a Microcontroller.Marcel Dombrowski, Kenneth B. Kent, Yves G. Losier, Adam W. Wilson, Rainer Herpers
2012FPGAThe VTR project: architecture and CAD for FPGAs from verilog to routing.Jonathan Rose, Jason Luu, Chi Wai Yu, Opal Densmore, Jeffrey Goeders, Andrew Somerville, Kenneth B. Kent, Peter Jamieson, Jason Helge Anderson
2012FPLImproving memory support in the VTR flow.Andrew Somerville, Kenneth B. Kent
2012RSPVisualization support for FPGA architecture exploration.Konstantin Nasartschuk, Rainer Herpers, Kenneth B. Kent
2011RSPFPGA based real-time object detection approach with validation of precision and performance.Alexander Bochem, Kenneth B. Kent, Rainer Herpers
2011RSPFPGA design for monitoring CANbus traffic in a prosthetic limb sensor network.Alexander Bochem, Kenneth B. Kent, Yves G. Losier, Jeremy Williams, Justin Deschenes
2010FCCMOdin II - An Open-Source Verilog HDL Synthesis Tool for CAD Research.Peter Jamieson, Kenneth B. Kent, Farnaz Gharibian, Lesley Shannon
2010FPGAOdin II: an open-source verilog HDL synthesis tool for FPGA cad flows (abstract only).Peter A. Jamieson, Kenneth B. Kent
2009FPGACustomizable bit-width in an OpenMP-based circuit design tool.Timothy F. Beatty, Eric E. Aubanel, Kenneth B. Kent
2009RSPRapid Prototyping Projection Algorithms with FPGA Technology.John Cole, Larry Garey, Kenneth B. Kent
2009RSPA Methodology for Rapid Optimization of HandelC Specifications.Joseph C. Libby, Kenneth B. Kent
2008DSDAutomatic Identification of Parallelism in Handel-C.Joseph C. Libby, Farnaz Gharibian, Kenneth B. Kent
2008RSPFlexible Software-Hardware Network Intrusion Detection System.Ryan B. Proudfoot, Kenneth B. Kent, Eric E. Aubanel, Nan Chen
2008RSPApplication Specific Instruction Sets and their Impact on the Design Space Requirements of a Hardware Java Virtual Machine.Ryan Wood, Joseph C. Libby, Kenneth B. Kent
2007DSDAn Embedded Implementation of the Microsoft Common Language Infrastructure.Joseph C. Libby, Kenneth B. Kent
2007DSDAnalysis of Variable Reordering on the QMDD Representation of Quantum Circuits.Sharon Van Schaick, Kenneth B. Kent
2007RSPCodesign of a Computationally Intensive Problem in GF(3).Kenneth B. Kent, Beatriz C. Iaderoza, Micaela Serra
2006FPGAPeriodic licensing of FPGA based intellectual property.Nathaniel Couture, Kenneth B. Kent
2006ISCASA systolic array technique for determining common approximate substrings.Kenneth B. Kent, Jacqueline E. Rice
2006RSPParameter-Specific FPGA Implementation of Edit-Distance Calculation.Kenneth B. Kent, Ryan B. Proudfoot, Yong Zhao
2006RSPAn Embedded Java Virtual Machine Using Network-on-Chip Design.Graham Mathias, Kenneth B. Kent
2005DSDHardware-Based Implementation of the Common Approximate Substring Algorithm.Kenneth B. Kent, Sharon Van Schaick, Jacqueline E. Rice, Patricia A. Evans
2005FPGAConfigurable hardware solutions for computing autocorrelation coefficients: a case study (abstract only).Jacqueline E. Rice, Kenneth B. Kent, Troy Ronda, Zhao Yong
2005RSPThread-Level Parallel Execution in Co-Designed Virtual Machines.Thomas S. Hall, Kenneth B. Kent
2004RSPRapid Prototyping of a Co-Designed Java Virtual Machine.Kenneth B. Kent, Hejun Ma, Micaela Serra
2003ISCASUsing FPGAs to solve the Hamiltonian cycle problem.Micaela Serra, Kenneth B. Kent
2002DSDHardware Architecture for Java in a Hardware/Software Co-Design of the Virtual Machine.Kenneth B. Kent, Micaela Serra
2000RSPHardware/Software Co-Design of a Java Virtual Machine.Kenneth B. Kent, Micaela Serra