Amir M. Hajisadeghi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2018–2022
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2022 | DSD | EARL: An Efficient Approximate HaRdware Framework for AcceLerating Fault Tree Analysis. | Salar Hashemi, Amir M. Hajisadeghi, Hamid R. Zarandi |
| 2019 | EDCC | A Fast and Efficient Fault Tree Analysis Using Approximate Computing. | Salar Hashemi, Amir M. Hajisadeghi, Hamid R. Zarandi, Saadat Pour-Mozafari |
| 2018 | DSD | DUSTER: DUal Source Write TERmination Method for STT-RAM Memories. | Saaed S. Faraji, Javad Talafy, Amir M. Hajisadeghi, Hamid R. Zarandi |
| 2018 | DSD | MOMENT: A Cross-Layer Method to Mitigate Multiple Event Transients in Combinational Circuits. | Amir M. Hajisadeghi, Hossein Bardareh, Hamid R. Zarandi |
| 2018 | IOLTS | A Low-Cost Soft Error Tolerant Read Circuit for Single/Multi-Level Cross-Point RRAM Arrays. | Hossein Bardareh, Amir M. Hajisadeghi, Hamid R. Zarandi |