| 2026 | Sandbox-Enabled Digital Twin for Cyber-Physical Systems. | Meet Udeshi, Md Raz, Prashanth Krishnamurthy, Ramesh Karri, Farshad Khorrami |
| 2026 | Evaluating Runtime Protection Opportunities in AI Inference through Microarchitectural Fault Injection. | Maria Trakosa, Odysseas Chatzopoulos, Dimitris Gizopoulos |
| 2026 | Reducing Safety False-Positives in Parity-Based Security AES Using a Hardware Fault Classifier. | Daniel Thirion, Jean-Marc Daveau, Valentin Egloff, Vincent Beroulle, Philippe Roche, David Hly |
| 2026 | Evaluation of FPGA Delay Injection Mechanisms for Small Delay Fault Analysis. | Tijmen T. Smit, David Postema, Pieter Paasman, Marco Ottavi |
| 2026 | Early-Stage Reliability Assessment of Tensor-Based Deep Learning Accelerators. | Robert Limas Sierra, Alessandro Veronesi, Josie E. Rodriguez Condia, Letcia Maria Bolzani Phls, Matteo Sonza Reorda |
| 2026 | LOFT: Latent-Fault Optimization Training for Yield Boost in Resistive Crossbar AI Accelerators. | Shanmukha Mangadahalli Siddaramu, Mehdi B. Tahoori |
| 2026 | Reliability of Multilevel Cell Phase-Change Memories for AI Implementations. | G. Settegrani, R. Gattoni, Sara Cret, Matteo Naldi, Martin Omaa, Cecilia Metra, I. S. Troja |
| 2026 | PATCH-FFT: Unmasking Dormant Hardware Trojans with Patch-Based Frequency-Domain Transformers. | Hasala Senevirathne, Amin Rezaei |
| 2026 | GINx4TL: Fine-grained Hardware Trojan Localization and Extraction Using Feature Explainable Graph Isomorphism Network. | Afjal Hossan Sarower, Rozhin Yasaei |
| 2026 | When AI Designs AI Hardware: Reliability Lessons from Accelerator Architectures. | Anton Rozen, Freddy Gabbay |
| 2026 | Efficiently Mitigating Model Extraction Attacks against Neural Networks on Edge Devices. | Antonio Porsia, Giuseppe Monteasi, Annachiara Ruospo, Domenico Galdiero, Ernesto Snchez |
| 2026 | Thermal Laser Stimulation of Bulk Built-In Current Sensors in Silicon Devices. | Hugo Perrin, Jean-Baptiste Rigaud, Raphael Viera |
| 2026 | Vectorized in-Place CRC: a Zero Memory-Overhead Fault Detection Scheme for QNNs on RISC-V. | Giacomo Perlo, Annachiara Ruospo, Ernesto Snchez |
| 2026 | Trust, but Verify: Reliable Compute-in-Memory via Double-Reference Sensing and Selective Recompute. | Ali Nezhadi, Odysseas Chatzopoulos, Dimitris Gizopoulos, Mehdi B. Tahoori |
| 2026 | Statistical Analysis of Architectural Vulnerability Factor for Soft Errors. | Alessandra Nardi, David Kingston, Ghani Kanawati, Gourav Goyal, Mouadh Ayache, David Johnson, Jean-Marc Forey |
| 2026 | Functional Self-Test for Deep Neural Networks. | Dina A. Moussa, Michael Hefenbrock, Mehdi B. Tahoori |
| 2026 | Hybrid Hardening for Robust DNNs Under Adversarial Attacks. | Leonardo Alexandrino De Melo, Manar Gani, Alberto Bosio, Ovidiu Stan, Vlad-Cristian Miclea, Liviu Miclea, Rodrigo Possamai Bastos, David Novo, Bastien Deveautour |
| 2026 | Efficient Multiple Error Correction in Binary HDC Systems Using Majority-Encoded Hypervector Matrices. | Mohamed Mejri, Abhijit Chatterjee |
| 2026 | Trustworthy Neuromorphic and Quantum Machine Learning: Challenges and Emerging Directions. | Alberto Marchisio, Muhammad Shafique |
| 2026 | TroPUF: Evaluating Hardware Trojan Insertion in Delay-Based Physical Unclonable Functions. | Marissa Marcarelli, Amin Rezaei |
| 2026 | FD-SOI rather than Bulk - Experimental investigation of laser induced fault mechanisms in FD-SOI. | Loc Mangin, Krishna Pradeep, Romain Wacquez, Laurent Maingault, Philippe Flatresse, Adri Calvo Bellocq, Rainer Lutz |
| 2026 | Impact of Locations of Circuit Components on Multiple Cell Upset Mitigation in a 22 nm Bulk Process. | Shuhei Mandai, Ryuichi Nakajima, Arata Matsumoto, Yusaku Nakaoka, Hikaru Nakamoto, Sotaro Taniguchi, Shinobu Onoda, Jun Furuta, Kazutoshi Kobayashi |
| 2026 | Progressive Error-Aware ECC Techniques for Enhancing Flash Memory Reliability. | Shyue-Kung Lu, Jie-Xin Shi, Shi-Yu Huang, Kohei Miyase |
| 2026 | InjectV: Modeling Fault Injection Attacks in RISC-V Simulation Environment. | Niccol Lentini, Giorgio Fardo, Stefano Di Carlo, Alessandro Savino |
| 2026 | Reality Check for RISC-V: Assessing Software Maturity, Performance and Security. | Elia Lazzeri, Gianluca Furano, Luca Cassano |