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Massimo Violante

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

76

Venues

21

Active years

1998–2026

Best venue rank

C

Where they publish

Papers

76 indexed papers, newest first.

YearVenueTitleAuthors
2026COMPSACA Deterministic PPG-Based Algorithm for Obstructive Sleep Apnea Detection.Michele Guagnano, Sara Groppo, Andrea Romigi, Massimo Violante
2026COMPSACRule-Based Arrhythmia Screening from Single-Lead ECG for Continuous Monitoring.Maria Sumerano, Sara Groppo, Massimo Violante
2025DATEImproving Software Reliability with Rust: Implementation for Enhanced Control Flow Checking Methods.Jacopo Sini, Mohammadreza Amel Solouki, Massimo Violante, Giorgio Di Natale
2025DSDShapeFuture - Technical Progress After Year 1.Norbert Druml, Martin Gschwandtner, Mayeul Jeannin, Rainer Matischek, Edgars Lielamurs, Maksis Celitans, Kaspars Ozols, Nurullah Demiralay, Besir Tayfur, Ismail Sinan Gulbas, Nadir Kucuk, Isa Kiyat, Yahya Nasolo, Jens Uwe Brandt, Noah Christoph Ptz, Thomas Bartz-Beielstein, Jose Isola, Nikola Mandic, Francesca Flamigni, Alexander Kuehhas, Gianluca Brilli, Paolo Burgio, Giacomo Paolieri, Jorge Villagra, lvaro Flores Cueto, Jos Antonio Snchez, Jacopo Sini, Massimo Violante, Lorenzo Giraudi, Paolo Santero, Uwe Klbel, Moritz Schaffenroth, Panu Sjvall, Jarno Vanne, Morten Larsen, Nergis Gizem Yilmaz, Ziya Uygar Yengin, George Dimitrakopoulos
2025ETSEuropean Test Symposium Teams: an Anniversary Snapshot.Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025SMCReal-Time Driving Risk Assessment Using LSTM-attention and XGBoost with Physiological and Driving Behavior Data.Yecan Wang, Michele Guagnano, Hiroki Taniguchi, Nozomi Nagatani, Hiroshi Ono, Satoru Shinkawa, Sumie Miyamoto, Eriko Hasumi, Katsuhito Fujiu, Madoka Takai, Massimo Violante, Shigenobu Mitsuzawa
2024ETFAOptimizing Lstm-Based Temperature Prediction Algorithm for Embedded System Deployment.Pietro d'Agostino, Massimo Violante, Gianpaolo Macario
2024FIEWIP: Building an Education Ecosystem for Next Generation Microelectronics Experts in Green and Circular Economy with Digitally-Supported Teaching Methods for Sustainable Chips and Applications (EU Project GreenChips-EDU).Klaus Hofmann, Ferdinand Keil, David Riehl, Alicja Michalowska-Forsyth, Nikolaus Czepl, Sarah Woywod, Dominik Zupan, Mario R. Casu, Carlo Ricciardi, Massimo Violante, Mariagrazia Graziano, Yuri Ardesi, Fabrizio Mo, Dominik Berger, Sabine Sill, Volker Visotschnig, Panagiota Morfouli, Liliana Prejbeanu, Katell Morin-Allory, Cyrille Chavet, Davide Bucci, Skandar Basrour, Jean-Christophe Crebier, Nhu-Huan Nguyen, Ernesto Quisbert-Trujillo, Christian Deflix, Isabelle Corbett-Etchevers, Johannes Sturm, Jens Peter Konrath, Ulla Birnbacher, Thomas Klinger, Wolfgang Werth, Jorge Fernandes, Marcelino B. Santos, Antonio Rubio, Alba Pags-Zamora, Josep Pegueroles, Jordi Salazar, Beatriz Otero, J. Manuel Moreno, X. Aragones, Israel Martin, Aleix Sole, Dunja Suttnig, Julia Calabro, Floriberto Lima, Eric Jouseau, Franois Cerisier, Cristian Rivier, Sepp Eisenriegler, Harald Reichl, Miroslav Macan, Dubravko Kruselj, Mladen Puskaric, Mirjana Tatalovic, Vinko Zelenicic, Bernd Deutschmann
2022SOFTCOMUse of Facial Expressions to Improve the Social Acceptance of Level 4 and 5 Automated Driving System Equipped Vehicles.Antonio Costantino Marceddu, Jacopo Sini, Bartolomeo Montrucchio, Massimo Violante
2019IOLTSA Novel Simulation-Based Approach for ISO 26262 Hazard Analysis and Risk Assessment.Jacopo Sini, Massimo Violante, V. Dodde, R. Gnaniah, L. Pecorella
2018DDECSQoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications.Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin
2018ETFAComputer-Aided Design of Multi-Agent Cyber-Physical Systems.Jacopo Sini, Massimo Violante, Riccardo Dess
2018IOLTSEfficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality Systems.Stefano Esposito, Serhiy Avramenko, Massimo Violante
2018IOLTSReal-Time Validation of Fault-Tolerant Mixed-Criticality Systems.Stefano Esposito, Jacopo Sini, Massimo Violante
2018IOLTSTowards an automatic approach for hardware verification according to ISO 26262 functional safety standard.Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson
2018IOLTSAn Automatic Approach to Perform FMEDA Safety Assessment on Hardware Designs.Jacopo Sini, Massimo Violante
2018VTSInnovative practices on quality levels of A/MS devices.Wim Dobbelaere, On Semi, Massimo Violante, Turin Polytechnic, Jeff Rearick
2017IOLTSDeterministic network on chip for deploying real time applications on many-core processors.Stefano Esposito, Massimo Violante
2016ETSAutomotive embedded software architecture in the multi-core age.Paolo Gai, Massimo Violante
2016IOLTSOn the robustness of DCT-based compression algorithms for space applications.Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Grschwin Fey, Jan-Gerd Mess, Robert Schmidt
2016IOLTSOnline time interference detection in mixed-criticality applications on multicore architectures using performance counters.Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone
2015IOLTSAn Hybrid Architecture for consolidating mixed criticality applications on multicore systems.Serhiy Avramenko, Stefano Esposito, Massimo Violante, Marco Sozzi, Massimo Traversone, Marco Binello, Marco Terrone
2013IOLTSA fully-automated flow for ITAR-free rad-hard Atmel FPGAs.Nikos Andrikos, Massimo Violante, David Merodio Codinachs
2012DATEAn hybrid architecture to detect transient faults in microprocessors: An experimental validation.Salvatore Campagna, Massimo Violante
2012FITEmbedded Low Power Controller for Autonomous Landing of UAV Using Artificial Neural Network.Ahmad Din, Basilio Bona, Joel Morrissette, Moazzam Hussain, Massimo Violante, M. Fawad Naseem
2011IOLTSA new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories.Enrico Costenaro, Massimo Violante, Dan Alexandrescu
2010ETSAn integrated flow for the design of hardened circuits on SRAM-based FPGAs.Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccol Battezzati, Luca Sterpone, Massimo Violante
2010IOLTSA new framework for the automatic insertion of mitigation structures in circuits netlists.Niccol Battezzati, Davide Serrone, Massimo Violante
2010IOLTSA framework to support the design of COTS-based reliable space computers for on-board data handling.Salvatore Campagna, Massimo Violante
2009DATEA study of the Single Event Effects impact on functional mapping within Flash-based FPGAs.Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt
2009DATEA low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips.Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009FPLSoft errors in Flash-based FPGAs: Analysis methodologies and first results.Niccol Battezzati, Filomena Decuzzi, Luca Sterpone, Massimo Violante
2009IOLTSApplication-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs.Niccol Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet
2009IOLTSA low-cost solution for developing reliable Linux-based space computers for on-board data handling.Massimo Violante, M. L. Esposti
2008IOLTSOn the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs.Niccol Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante
2007ETSStatic and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs.Luca Sterpone, Massimo Violante
2007IOLTSSelf Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
2006DATEA new approach to compress the configuration information of programmable devices.Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante
2006DDECSReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications.Luca Sterpone, Massimo Violante
2006ETSFault Injection-based Reliability Evaluation of SoPCs.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-Garca, Celia Lpez-Ongil, Luis Entrena
2006IOLTSHardware-in-the-Loop-Based Dependability Analysis of Automotive Systems.Matteo Sonza Reorda, Massimo Violante
2006IOLTSDependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices.Luca Sterpone, Massimo Violante
2005DSNOn-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core.Paolo Bernardi, Letcia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2005ETSMultiple errors produced by single upsets in FPGA configuration memory: a possible solution.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2005GECCONew evolutionary techniques for test-program generation for complex microprocessor cores.Ernesto Snchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante
2005IOLTSEfficient Estimation of SEU Effects in SRAM-Based FPGAs.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2004CECA local analysis of the genotype-fitness mapping in hardware optimization problems.Ernesto Snchez, Giovanni Squillero, Massimo Violante
2004DATEEvaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA.M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin
2004DATEAutomatic Generation of Validation Stimuli for Application-Specific Processors.Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2004IOLTSOn the Evaluation of SEU Sensitiveness in SRAM-Based FPGAs.Paolo Bernardi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2004IOLTSHybrid Soft Error Detection by Means of Infrastructure IP Cores.Letcia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2003DATEA P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories.Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003DATEAn Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003FPLEmulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits.Matteo Sonza Reorda, Massimo Violante
2003IOLTSAn RT-level Concurrent Error Detection Technique for Data Dominated Systems.Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2003IOLTSAccurate and Efficient Analysis of Single Event Transients in VLSI Circuits.Matteo Sonza Reorda, Massimo Violante
2003IOLTSAnalyzing SEU Effects in SRAM-based FPGAs.Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori
2003ITCExploiting Programmable BIST For The Diagnosis of Embedded Memory Cores.Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante
2002FPLSimulation-Based Analysis of SEU Effects on SRAM-based FPGAs.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002IOLTSAnalysis of SEU Effects in a Pipelined Processor.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001DATESystem safety through automatic high-level code transformations: an experimental evaluation.Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001DATEOn the test of microprocessor IP cores.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2001FPLFPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001IOLTSExploiting FPGA for Accelerating Fault Injection Experiments.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001VLSIDEarly Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs.Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante
2001SCAMA Source-to-Source Compiler for Generating Dependable Software.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano
2000DATEEvaluating System Dependability in a Co-Design Framework.Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000ETSCA-CSTP: a new BIST architecture for sequential circuits.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000ETSSystem-level test bench generation in a co-design framework.Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000IOLTSNew Techniques for Accelerating Fault Injection in VHDL Descriptions.B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000IOLTSEvaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco
2000ICTAIA genetic algorithm-based system for generating test programs for microprocessor IP cores.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000VTSLow Power BIST via Non-Linear Hybrid Cellular Automata.Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000SAFECOMPSpeeding-Up Fault Injection Campaigns in VHDL Models.B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999ETSA new BIST architecture for low power circuits.Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1998DATEExploiting Symbolic Techniques for Partial Scan Flip Flop Selection.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante