Skip to content

IEEE VLSI Test Symposium

VTS

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering

Papers indexed

2,208

1991–2026

Papers per year

199189 peak2026

VTS papers

2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2026Late Breaking Results - Feature-Aware Trojan Alteration to Evade ML-Based Detection.Lizi Zhang, Navid Nader Tehrani, Azadeh Davoodi, Rasit Onur Topaloglu
2026Cross-Layer Reliability Analysis of Slimmable Neural Networks under Permanent Faults.Nikolaos Zazatis, Alessandro Veronesi, Konstantinos Varakliotis, Pelopidas Tsoumanis, Christos P. Sotiriou, Letcia Maria Bolzani Phls, Marko S. Andjelkovic, Davide Bertozzi
2026Digital Calibration and Correction Techniques for Digital Phase-Locked Loops.Mingyang You, Qiaochu Zhang
2026FVRuleLearner: Operator-Level Reasoning Tree (Op-Tree)-Based Rules Learning for Formal Verification.Lily Jiaxin Wan, Chia-Tung Ho, Yunsheng Bai, Cunxi Yu, Deming Chen, Haoxing Ren
2026Embedded Tutorial: A Primal-Dual Paradigm for Agentic Test Data Analytics.Li-C. Wang, Seoyeon Kim
2026Closing the Loop in LLM-Based Hardware Generation: An Autonomous Agentic Workflow for Robust TPU Design.Deepak Vungarala, Kartik Pandit, Gamana Aragonda, Jeremy McLynch, Adeola Adeoye-Davids, Bryan Galecio, NhatHai Phan, Abdallah Khreishah, Ramtin Zand, Arnob Ghosh, Shaahin Angizi
2026Analog Correlators with Applications to Low-power Radar and Spectrum Sensing.Aswin Chowdary Undavalli, Kareem Rashed, Shantanu Chakrabartty, Arun Natarajan, Aravind Nagulu
2026ENFOR-SA: End-to-end Cross-layer Transient Fault Injector for Efficient and Accurate DNN Reliability Assessment on Systolic Arrays.Rafael Billig Tonetto, Marcello Traiola, Fernando Fernandes dos Santos, Angeliki Kritikakou
2026WARP-TPG: Warpage-Aware Test Pattern Generation for Small-Delay Defects.Dhruv Thapar, Arjun Chaudhuri, Krishnendu Chakrabarty
2026NERT: Network- and Routing-aware Testing of Interconnects in Fanout Wafer-Level Packaging.Dhruv Thapar, Partho Bhoumik, Arjun Chaudhuri, Krishnendu Chakrabarty
20262.5D/3D Chiplet-based Integration: New Dimensions in Design and Testing.Ganap A. Tewary, Partho Bhoumik, Pragnya S. Nalla, Yu Cao, Krishnendu Chakrabarty, Jeff Zhang
2026Trust Calibration for RF and Analog Mixed-Signal Systems: A Survey of Lightweight Hardware Security.Bustana Teene, Ankit Mittal
2026Innovative Practices Session: Hardware Security and Test.Jonti Talukdar, Sohrab Aftabjahani
2026Non-Intrusive THz Chiplet Calibration Using Deep Neural Networks.Amirata Tabatabavakili, Mohammed Ayman Habib, Osei Brempong, Morteza Fayazi, Ehsan Afshari
2026Innovative Practices Session: Applying Analog Scan to Industrial Circuits.Stephen Sunter, Marampally Saikiran, Degang Chen, Ashok Mathur
2026Temporal Reference Scouting Logic for PVT Reliable Logic Computation-in-Memory.Shanmukha Mangadahalli Siddaramu, Ali Nezhadi, Mahta Mayahinia, Sule Ozev, Mehdi B. Tahoori
2026HAT-FI: Hardware-Aware Training for Fault-Tolerant LLM Inference on RRAM-Based Compute-in-Memory.Pragya Sharma, Soyed Tuhin Ahmed, Farshad Firouzi, Krishnendu Chakrabarty
2026Late Breaking Results - High-Throughput Metastability Characterization of Arbiters using HDC-based BIST.Abdullah Sahruri, Martin Margala
2026RTL-Forge: CNF-Anchored, LLM-Assisted Verilog Generation.Prithwish Basu Roy, Akashdeep Saha, Manaar Alam, Johann Knechtel, Michail Maniatakos, Ozgur Sinanoglu, Ramesh Karri
2026Forensics of Quantum Processors using Program Queue Depth Analysis.Rupshali Roy, Swaroop Ghosh
2026Who Checks the Checker? Enhancing Component-level Architectural SEU Fault Tolerance for End-to-End SoC Protection.Michael Rogenmoser, Philippe Sauter, Chen Wu, Angelo Garofalo, Luca Benini
2026SafeTune: Mitigating Data Poisoning in LLM Fine-Tuning for RTL Code Generation.Mahshid Rezakhani, Nowfel Mashnoor, Kimia Zamiri Azar, Hadi Kamali
2026Assessment of Security Risks and Defenses in Chiplet Systems.Hasin Ishraq Reefat, Hossein Pourmehrani, Junie Um, Sylvain Guilley, Naghmeh Karimi
2026ROCKET: Runtime Operating-Condition Aware KEy Refreshing Technique for Resisting Side-Channel Analysis Attacks.Hasin Ishraq Reefat, Hossein Pourmehrani, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi
2026Late Breaking Results - A Systematic Vulnerability Analysis of MRAM-Based Compute-in-Memory against Side-Channel Attacks.Hossein Pourmehrani, Yashas Krishnamohan, Sumukh Prashant Bhanushali, Saurabh Dhiman, Rajendra Bishnoi, Arindam Sanyal, Farshad Firouzi, Naghmeh Karimi
125 of 2,208← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.