| 2020 | ITC | Functional Test Sequences for Inducing Voltage Droops in a Multi-Threaded Processor. | Vijay Kiran Kalyanam, Eric Mahurin, Michael Spence, Jacob A. Abraham |
| 2019 | DAC | Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. | Eric Cheng, Daniel Mueller-Gritschneder, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Deming Chen, Hyungmin Cho, Yanjing Li, Uzair Sharif, Kevin Skadron, Mircea Stan, Ulf Schlichtmann, Subhasish Mitra |
| 2019 | IOLTS | Resiliency Demands on Next Generation Critical Embedded Systems. | Jacob A. Abraham |
| 2018 | IOLTS | Effective Control Flow Integrity Checks for Intrusion Detection. | Ameya Chaudhari, Jacob A. Abraham |
| 2018 | IOLTS | Cross-Layer Control Adaptation for Autonomous System Resilience. | Md Imran Momtaz, Suvadeep Banerjee, Sujay Pandey, Jacob A. Abraham, Abhijit Chatterjee |
| 2018 | IOLTS | ESIFT: Efficient System for Error Injection. | Ninghan Tian, Daniel G. Saab, Jacob A. Abraham |
| 2017 | ICCD | Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. | Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra |
| 2017 | IOLTS | Design of efficient error resilience in signal processing and control systems: From algorithms to circuits. | Jacob A. Abraham, Suvadeep Banerjee, Abhijit Chatterjee |
| 2016 | DAC | Clear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores. | Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra |
| 2016 | ITC | Efficient cross-layer concurrent error detection in nonlinear control systems using mapped predictive check states. | Suvadeep Banerjee, Abhijit Chatterjee, Jacob A. Abraham |
| 2016 | VLSID | Design of Self Calibrating and Error Resilient Mixed-Signal Systems for Signal Processing, Communications and Control. | Jacob A. Abraham, Abhijit Chatterjee |
| 2016 | VTS | Keynote address: Challenges and opportunities in electrical characterization and test for 14nm and below. | Andrzej J. Strojwas, Jacob A. Abraham, Hong Hao, Max M. Shulaker |
| 2015 | DATE | Efficient soft error vulnerability estimation of complex designs. | Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham |
| 2015 | FPGA | Formal Verification ATPG Search Engine Emulator (Abstract Only). | Gregory Ford, Aswin Krishna, Jacob A. Abraham, Daniel G. Saab |
| 2015 | ICCD | Power-aware multi-voltage custom memory models for enhancing RTL and low power verification. | Vijay Kiran Kalyanam, Martin Saint-Laurent, Jacob A. Abraham |
| 2015 | IOLTS | The future of fault tolerant computing. | Jacob A. Abraham, Ravishankar K. Iyer, Dimitris Gizopoulos, Dan Alexandrescu, Yervant Zorian |
| 2015 | VLSID | Tutorial T3: Error Resilient Real-Time Embedded Systems: Computing, Communications and Control. | Jacob A. Abraham, Abhijit Chatterjee |
| 2015 | VTS | In-depth soft error vulnerability analysis using synthetic benchmarks. | Shahrzad Mirkhani, Balavinayagam Samynathan, Jacob A. Abraham |
| 2014 | ASPDAC | Rethinking error injection for effective resilience. | Shahrzad Mirkhani, Hyungmin Cho, Subhasish Mitra, Jacob A. Abraham |
| 2014 | DATE | A novel low power 11-bit hybrid ADC using flash and delay line architectures. | Hsun-Cheng Lee, Jacob A. Abraham |
| 2014 | DATE | Connecting different worlds - Technology abstraction for reliability-aware design and Test. | Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Gla, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn |
| 2014 | IPCCC | A novel algorithm for sparse FFT pruning and its applications to OFDMA technology. | Shakeel S. Abdulla, Haewoon Nam, Jacob A. Abraham |
| 2014 | ITC | EAGLE: A regression model for fault coverage estimation using a simulation based metric. | Shahrzad Mirkhani, Jacob A. Abraham |
| 2014 | VTS | Special session 8B - Panel: In-field testing of SoC devices: Which solutions by which players? | Jacob A. Abraham, Xinli Gu, Teresa MacLaurin, Janusz Rajski, Paul G. Ryan, Dimitris Gizopoulos, Matteo Sonza Reorda |
| 2014 | VTS | Fast evaluation of test vector sets using a simulation-based statistical metric. | Shahrzad Mirkhani, Jacob A. Abraham |
| 2013 | DAC | Quantitative evaluation of soft error injection techniques for robust system design. | Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A. Abraham, Subhasish Mitra |
| 2013 | DATE | Non-speculative double-sampling technique to increase energy-efficiency in a high-performance processor. | Junyoung Park, Ameya Chaudhari, Jacob A. Abraham |
| 2013 | IOLTS | Real-time checking of linear control systems using analog checksums. | Suvadeep Banerjee, Aritra Banerjee, Abhijit Chatterjee, Jacob A. Abraham |
| 2013 | ITC | Application of under-approximation techniques to functional test generation targeting hard to detect stuck-at faults. | Mahesh Prabhu, Jacob A. Abraham |
| 2013 | VLSID | Dynamic Trace Signal Selection for Post-Silicon Validation. | Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham |
| 2013 | VTS | A framework for low overhead hardware based runtime control flow error detection and recovery. | Ameya Chaudhari, Junyoung Park, Jacob A. Abraham |
| 2013 | VTS | Enhanced algorithm of combining trace and scan signals in post-silicon validation. | Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham |
| 2013 | VTS | Special session 12B: Panel post-silicon validation & test in huge variance era. | Takahiro J. Yamaguchi, Jacob A. Abraham, Gordon W. Roberts, Suriyaprakash Natarajan, Dennis J. Ciplickas |
| 2012 | DATE | On-chip source synchronous interface timing test scheme with calibration. | Hyunjin Kim, Jacob A. Abraham |
| 2012 | ETS | Indirect method for random jitter measurement on SoCs using critical path characterization. | Jae Wook Lee, Ji Hwan (Paul) Chun, Jacob A. Abraham |
| 2012 | ETS | Functional test generation for hard to detect stuck-at faults using RTL model checking. | Mahesh Prabhu, Jacob A. Abraham |
| 2012 | IOLTS | Stream cipher hash based execution monitoring (SCHEM) framework for intrusion detection on embedded processors. | Ameya Chaudhari, Jacob A. Abraham |
| 2012 | ITC | FALCON: Rapid statistical fault coverage estimation for complex designs. | Shahrzad Mirkhani, Jacob A. Abraham, Toai Vo, Hong Shin Jun, Bill Eklow |
| 2012 | VLSID | Run-time Prediction of the Optimal Performance Point in DVS-based Dynamic Thermal Management. | Junyoung Park, H. Mert Ustun, Jacob A. Abraham |
| 2012 | VTS | Test of phase interpolators in high speed I/Os using a sliding window search. | Ji Hwan (Paul) Chun, Siew Mooi Lim, Shao Chee Ong, Jae Wook Lee, Jacob A. Abraham |
| 2012 | VTS | An oscillation-based test structure for timing information extraction. | Eun Jung Jang, Anne Gattiker, Sani R. Nassif, Jacob A. Abraham |
| 2012 | VTS | A Built-In Self-Test scheme for DDR memory output timing test and measurement. | Hyunjin Kim, Jacob A. Abraham |
| 2012 | VTS | An aging-aware flip-flop design based on accurate, run-time failure prediction. | Junyoung Park, Jacob A. Abraham |
| 2011 | ASPDAC | Path criticality computation in parameterized statistical timing analysis. | Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham |
| 2011 | ASPDAC | System accuracy estimation of SRAM-based device authentication. | Joonsoo Kim, Joonsoo Lee, Jacob A. Abraham |
| 2011 | ASPDAC | Robust power gating reactivation by dynamic wakeup sequence throttling. | Tung-Yeh Wu, Shih-Hsin Hu, Jacob A. Abraham |
| 2011 | DAC | Testability driven statistical path selection. | Jaeyong Chung, Jinjun Xiong, Vladimir Zolotov, Jacob A. Abraham |
| 2011 | ISLPED | A fast, accurate and simple critical path monitor for improving energy-delay product in DVS systems. | Junyoung Park, Jacob A. Abraham |
| 2011 | VTS | Efficient and product-representative timing model validation. | Eun Jung Jang, Anne E. Gattiker, Sani R. Nassif, Jacob A. Abraham |
| 2010 | ASPDAC | A novel characterization technique for high speed I/O mixed signal circuit components using random jitter injection. | Ji Hwan (Paul) Chun, Jae Wook Lee, Jacob A. Abraham |
| 2010 | ETS | Calibration-enabled scalable built-in current sensor compatible with very low cost ATE. | Sachin Dileep Dasnurkar, Jacob A. Abraham |
| 2010 | ETS | A Built-In Self-Test scheme for high speed I/O using cycle-by-cycle edge control. | Hyunjin Kim, Jaeyong Chung, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo |
| 2010 | ICCD | Toward reliable SRAM-based device identification. | Joonsoo Kim, Joonsoo Lee, Jacob A. Abraham |
| 2010 | IJCNN | An improved SOM-based visualization technique for DNA microarray data analysis. | Jagdish Chandra Patra, Jacob A. Abraham, Pramod Kumar Meher, Goutam Chakraborty |
| 2010 | VTS | Reducing test time and area overhead of an embedded memory array built-in repair analyzer with optimal repair rate. | Jaeyong Chung, Joonsung Park, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo |
| 2010 | VTS | Multitone digital signal based test for RF receivers. | Mohamad A. Zeidan, Aritra Banerjee, Ranjit Gharpurey, Jacob A. Abraham |
| 2009 | ETS | Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip. | Kihyuk Han, Joonsung Park, Jae Wook Lee, Jacob A. Abraham, Eonjo Byun, Cheol-Jong Woo, Sejang Oh |
| 2009 | ETS | Critical Path Selection for Delay Test Considering Coupling Noise. | Rajeshwary Tayade, Jacob A. Abraham |
| 2009 | ICCAD | A hierarchy of subgraphs underlying a timing graph and its use in capturing topological correlation in SSTA. | Jaeyong Chung, Jacob A. Abraham |
| 2009 | ICCD | A high throughput FFT processor with no multipliers. | Shakeel S. Abdulla, Haewoon Nam, Mark McDermot, Jacob A. Abraham |
| 2009 | IOLTS | Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?. | Abhijit Chatterjee, Jacob A. Abraham, Adit D. Singh, Elie Maricau, Rakesh Kumar, Christos A. Papachristou |
| 2009 | IOLTS | Error detection in 2-D Discrete Wavelet lifting transforms. | Shih-Hsin Hu, Jacob A. Abraham |
| 2009 | ISCAS | Hybrid BiST Solution for Analog to Digital Converters with Low-cost Automatic Test Equipment Compatibility. | Sachin Dileep Dasnurkar, Jacob A. Abraham |
| 2009 | ISCAS | An Area Efficient On-chip Static IR Drop Detector/Evaluator. | Tung-Yeh Wu, Samaneh Gharahi, Jacob A. Abraham |
| 2009 | VLSID | Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL. | Vinod Viswanath, Shobha Vasudevan, Jacob A. Abraham |
| 2009 | VTS | Recursive Path Selection for Delay Fault Testing. | Jaeyong Chung, Jacob A. Abraham |
| 2009 | VTS | On-Line Calibration and Power Optimization of RF Systems Using a Built-In Detector. | Chaoming Zhang, Ranjit Gharpurey, Jacob A. Abraham |
| 2008 | ASPDAC | Analytical model for the impact of multiple input switching noise on timing. | Rajeshwary Tayade, Sani R. Nassif, Jacob A. Abraham |
| 2008 | DATE | Implications of Technology Trends on System Dependability. | Jacob A. Abraham |
| 2008 | DATE | Dependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems. | Neeraj Suri, Christof Fetzer, Jacob A. Abraham, Stefan Poledna, Avi Mendelson, Subhasish Mitra |
| 2008 | DATE | A low-cost concurrent error detection technique for processor control logic. | Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srinivas Patil, Rajesh Galivanche |
| 2008 | ETS | Jitter Decomposition in High-Speed Communication Systems. | Qingqi Dou, Jacob A. Abraham |
| 2008 | ETS | Critical Path Selection for Delay Test Considering Coupling Noise. | Rajeshwary Tayade, Jacob A. Abraham |
| 2008 | ICCD | Adaptive SRAM memory for low power and high yield. | Baker Mohammad, Stephen Bijansky, Adnan Aziz, Jacob A. Abraham |
| 2008 | IOLTS | Budget-Dependent Control-Flow Error Detection. | Ramtilak Vemu, Jacob A. Abraham |
| 2008 | ITC | On-chip Programmable Capture for Accurate Path Delay Test and Characterization. | Rajeshwary Tayade, Jacob A. Abraham |
| 2008 | VLSID | A Robust Top-Down Dynamic Power Estimation Methodology for Delay Constrained Register Transfer Level Sequential Circuits. | Sriram Sambamurthy, Jacob A. Abraham, Raghuram S. Tupuri |
| 2008 | VTS | Low-cost Test of Timing Mismatch Among Time-Interleaved A/D Converters in High-speed Communication Systems. | Qingqi Dou, Jacob A. Abraham |
| 2008 | VTS | Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal Circuits. | Byoungho Kim, Nash Khouzam, Jacob A. Abraham |
| 2008 | VTS | Parallel Loopback Test of Mixed-Signal Circuits. | Joonsung Park, Hongjoong Shin, Jacob A. Abraham |
| 2008 | VTS | Low Cost RF Receiver Parameter Measurement with On-Chip Amplitude Detectors. | Chaoming Zhang, Ranjit Gharpurey, Jacob A. Abraham |
| 2007 | ETS | Automatic Generation of Instructions to Robustly Test Delay Defects in Processors. | Sankar Gurumurthy, Ramtilak Vemu, Jacob A. Abraham, Daniel G. Saab |
| 2007 | ITC | ACCE: Automatic correction of control-flow errors. | Ramtilak Vemu, Sankar Gurumurthy, Jacob A. Abraham |
| 2007 | VLSID | Tutorial T4A: Formal Verification Techniques and Tools for Complex Designs. | Jacob A. Abraham, Daniel G. Saab |
| 2007 | VLSID | Efficient Microprocessor Verification using Antecedent Conditioned Slicing. | Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraham |
| 2007 | VTS | Transformer-Coupled Loopback Test for Differential Mixed-Signal Specifications. | Byoungho Kim, Zhenhai Fu, Jacob A. Abraham |
| 2006 | ASPDAC | Jitter decomposition in ring oscillators. | Qingqi Dou, Jacob A. Abraham |
| 2006 | DATE | Automatic insertion of low power annotations in RTL for pipelined microprocessors. | Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr. |
| 2006 | ETS | Optimized Signature-Based Statistical Alternate Test for Mixed-Signal Performance Parameters. | Byoungho Kim, Hongjoong Shin, Ji Hwan (Paul) Chun, Jacob A. Abraham |
| 2006 | IOLTS | CEDA: Control-flow Error Detection through Assertions. | Ramtilak Vemu, Jacob A. Abraham |
| 2006 | ITC | Automatic generation of instruction sequences targeting hard-to-detect structural faults in a processor. | Sankar Gurumurthy, Shobha Vasudevan, Jacob A. Abraham |
| 2006 | ITC | HDL Program Slicing to Reduce Bounded Model Checking Search Overhead. | Jen-Chieh Ou, Daniel G. Saab, Jacob A. Abraham |
| 2006 | ITC | Built-in Fault Diagnosis for Tunable Analog Systems Using an Ensemble Method. | Hongjoong Shin, Joonsung Park, Jacob A. Abraham |
| 2006 | MEMOCODE | Automatic decomposition for sequential equivalence checking of system level and RTL descriptions. | Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu |
| 2006 | VLSID | Checking Nested Properties Using Bounded Model Checking and Sequential ATPG. | Qiang Qiang, Daniel G. Saab, Jacob A. Abraham |
| 2006 | VTS | A Scheme for On-Chip Timing Characterization. | Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham |
| 2006 | VTS | Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits. | Hongjoong Shin, Byoungho Kim, Jacob A. Abraham |
| 2005 | FPL | An Emulation Model for Sequential ATPG-Based Bounded Model Checking. | Qiang Qiang, Daniel G. Saab, Jacob A. Abraham |
| 2005 | ICCD | Case Study of ATPG-based Bounded Model Checking: Verifying USB2.0 IP Core. | Qiang Qiang, Chia-Lun Chang, Daniel G. Saab, Jacob A. Abraham |
| 2005 | ITC | Testing and debugging delay faults in dynamic circuits. | Ramyanshu Datta, Sani R. Nassif, Robert K. Montoye, Jacob A. Abraham |
| 2005 | ITC | Automated mapping of pre-computed module-level test sequences to processor instructions. | S. Guramurthy, Shobha Vasudevan, Jacob A. Abraham |
| 2004 | ASPDAC | Effects of noise and nonlinearity on the calibration of a non-binary capacitor array in a successive approximation analog-to-digital converter. | Jianhua Gan, Shouli Yan, Jacob A. Abraham |
| 2004 | ETS | Delay fault testing and silicon debug using scan chains. | Ramyanshu Datta, Antony Sebastine, Jacob A. Abraham |
| 2004 | ISCAS | A low latency and low power dynamic Carry Save Adder. | Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka |
| 2004 | ITC | Tri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing. | Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu |
| 2004 | ITC | Quasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters. | Ashwin Raghunathan, Ji Hwan (Paul) Chun, Jacob A. Abraham, Abhijit Chatterjee |
| 2004 | ITC | Formal Verification of a System-on-Chip Using Computation Slicing. | Alper Sen, Vijay K. Garg, Jacob A. Abraham, Jayanta Bhadra |
| 2004 | ITC | Performance Characterization of Mixed-Signal Circuits Using a Ternary Signal Representation. | Hak-soo Yu, Hongjoong Shin, Ji Hwan (Paul) Chun, Jacob A. Abraham |
| 2004 | ITC | On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design. | Jing Zeng, Magdy S. Abadir, A. Kolhatkar, G. Vandling, Li-C. Wang, Jacob A. Abraham |
| 2004 | VLSID | Towards The Complete Elimination of Gate/Switch Level Simulations. | Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham |
| 2004 | VLSID | Program Slicing for ATPG-Based Property Checking. | Vivekananda M. Vedula, Whitney J. Townsend, Jacob A. Abraham |
| 2004 | VTS | Prediction of Analog Performance Parameters Using Oscillation Based Test. | Ashwin Raghunathan, Hongjoong Shin, Jacob A. Abraham, Abhijit Chatterjee |
| 2003 | ASPDAC | Efficient loop-back testing of on-chip ADCs and DACs. | Hak-soo Yu, Jacob A. Abraham, Sungbae Hwang, Jeongjin Roh |
| 2003 | IOLTS | On-Line Error Detecting Constant Delay Adder. | Whitney J. Townsend, Jacob A. Abraham, Parag K. Lala |
| 2003 | VLSID | Effects of Multi-cycle Sensitization on Delay Tests. | Arun Krishnamachary, Jacob A. Abraham |
| 2003 | VLSID | Formal Verification Using Bounded Model Checking: SAT versus Sequential ATPG Engines. | Daniel G. Saab, Jacob A. Abraham, Vivekananda M. Vedula |
| 2003 | VTS | DSP-Based Statistical Self Test of On-Chip Converters. | Hak-soo Yu, Sungbae Hwang, Jacob A. Abraham |
| 2003 | WISA | Model Checking of Security Protocols with Pre-configuration. | Kyoil Kim, Jacob A. Abraham, Jayanta Bhadra |
| 2002 | CAV | Property Checking via Structural Analysis. | Jason Baumgartner, Andreas Kuehlmann, Jacob A. Abraham |
| 2002 | DAC | False timing path identification using ATPG techniques and delay-based information. | Jing Zeng, Magdy S. Abadir, Jacob A. Abraham |
| 2002 | DATE | FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis. | Vivekananda M. Vedula, Jacob A. Abraham |
| 2002 | FPL | Massively Parallel/Reconfigurable Emulation Model for the D-algorithm. | Daniel G. Saab, Fatih Kocan, Jacob A. Abraham |
| 2002 | ITC | Verifying Properties Using Sequential ATPG. | Jacob A. Abraham, Vivekananda M. Vedula, Daniel G. Saab |
| 2002 | ITC | Optimal BIST Using an Embedded Microprocessor. | Sungbae Hwang, Jacob A. Abraham |
| 2002 | VLSID | An Efficient 3-Bit -Scan Multiplier without Overlapping Bits, and Its 64x64 Bit Implementation. | Hak-soo Yu, Jacob A. Abraham |
| 2002 | VTS | Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs? | Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham |
| 2002 | VTS | Program Slicing for Hierarchical Test Generation. | Vivekananda M. Vedula, Jacob A. Abraham, Jayanta Bhadra |
| 2001 | DATE | Full chip false timing path identification: applications to the PowerPCTM microprocessors. | Jing Zeng, Magdy S. Abadir, Jayanta Bhadra, Jacob A. Abraham |
| 2001 | VLSID | Timing Verification and Delay Test Generation for Hierarchical Designs. | Arun Krishnamachary, Jacob A. Abraham, Raghuram S. Tupuri |
| 2001 | VTS | Analog and Mixed Signal Benchmark Circuit Development: Who Needs Them? | Henry Chang, Steve Dollens, Gordon W. Roberts, Charles E. Stroud, Mani Soma, Jacob A. Abraham |
| 2000 | ASPDAC | Causality based generation of directed test cases. | Nina Saxena, Jacob A. Abraham, Avijit Saha |
| 2000 | ICCAD | Verification of Delta-Sigma Converters Using Adaptive Regression Modeling. | Jeongjin Roh, Suresh Seshadri, Jacob A. Abraham |
| 2000 | ICCD | An Adder Using Charge Sharing and its Application in DRAMs. | Hak-soo Yu, Songjun Lee, Jacob A. Abraham |
| 2000 | VLSID | Performance and Functional Verification of Microprocessors. | Pradip Bose, Jacob A. Abraham |
| 2000 | VLSID | A Mixed-Signal BIST Scheme with Time-Division Multiplexing (TDM) Comparator and Counters. | Jeongjin Roh, Jacob A. Abraham |
| 2000 | VLSID | Automatic Validation Test Generation Using Extracted Control Models. | Robert W. Sumners, Jayanta Bhadra, Jacob A. Abraham |
| 2000 | VLSID | Hierarchical Test Generation for Systems On a Chip. | Raghuram S. Tupuri, Jacob A. Abraham, Daniel G. Saab |
| 2000 | VTS | Validation of PowerPC(tm) Custom Memories using Symbolic Simulation. | Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham |
| 2000 | VTS | A Comprehensive TDM Comparator Scheme for Effective Analysis of Oscillation-Based Test. | Jeongjin Roh, Jacob A. Abraham |
| 1999 | DAC | Detecting False Timing Paths: Experiments on PowerPC Microprocessors. | Richard Raimi, Jacob A. Abraham |
| 1999 | DAC | Functional Verification of the Equator MAP1000 Microprocessor. | Jian Shen, Jacob A. Abraham, Dave Baker, Tony Hurson, Martin Kinkade, Gregorio Gervasio, Chen-chau Chu, Guanghui Hu |
| 1999 | DAC | Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor. | Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. Abraham |
| 1999 | DATE | An Efficient Filter-Based Approach for Combinational Verification. | Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell |
| 1999 | ICCD | Improving Witness Search Using Orders on States. | Robert W. Sumners, Jayanta Bhadra, Jacob A. Abraham |
| 1999 | ITC | Position Statement: Increasing Test Coverage in a VLSI Design Course. | Jacob A. Abraham |
| 1999 | ITC | Critical path identification and delay tests of dynamic circuits. | Kyung Tek Lee, Jacob A. Abraham |
| 1999 | ITC | Subband filtering scheme for analog and mixed-signal circuit testing. | Jeongjin Roh, Jacob A. Abraham |
| 1999 | VLSID | FzCRITIC - A Functional Timing Verifier Using a Novel Fuzzy Delay Model. | Rathish Jayabharathi, Manuel A. d'Abreu, Jacob A. Abraham |
| 1999 | VTS | Verification of Processor Microarchitectures. | Jian Shen, Jacob A. Abraham |
| 1998 | ICCAD | High-level design validation and test. | Sujit Dey, Jacob A. Abraham, Yervant Zorian |
| 1998 | ICCD | To model check or not to model check. | Nina Saxena, Jason Baumgartner, Avijit Saha, Jacob A. Abraham |
| 1998 | ISSRE | Lightweight guided random simulation. | Robert W. Sumners, Parminder Chhabra, Jacob A. Abraham |
| 1998 | ITC | Native mode functional test generation for processors with applications to self test and design validation. | Jian Shen, Jacob A. Abraham |
| 1998 | VTS | Automatic Test Pattern Generation for Crosstalk Glitches in Digital Circuits. | Kyung Tek Lee, Clay Nordquist, Jacob A. Abraham |
| 1998 | VTS | Using Verification Technology for Validation Coverage Analysis and Test Generation. | Dinos Moundanos, Jacob A. Abraham |
| 1997 | CAV | On Combining Formal and Informal Verification. | Jun Yuan, Jian Shen, Jacob A. Abraham, Adnan Aziz |
| 1997 | ITC | A Novel Functional Test Generation Method for Processors Using Commercial ATPG. | Raghuram S. Tupuri, Jacob A. Abraham |
| 1997 | VLSID | T4: Verification. | Rajesh Raina, Jacob A. Abraham, A. K. Pujari |
| 1997 | VLSID | A Novel Hierarchical Test Generation Method for Processors. | Raghuram S. Tupuri, Jacob A. Abraham |
| 1997 | VTS | Microprocessor Test and Validation: Any New Avenues? | Magdy S. Abadir, Jacob A. Abraham, Hong Hao, C. Hunter, Wayne M. Needham, Ron G. Walther |
| 1997 | VTS | A Novel Solution for Chip-Level Functional Timing Verification. | Rathish Jayabharathi, Kyung Tek Lee, Jacob A. Abraham |
| 1996 | ITC | Distributed Mixed Level Logic and Fault Simulation on the Pentium Pro Microprocessor. | Sankaran Karthik, Mark Aitken, Glidden Martin, Srinivasu Pappula, Bob Stettler, Praveen Vishakantaiah, Manuel A. d'Abreu, Jacob A. Abraham |
| 1996 | ITC | A Unified Framework for Design Validation and Manufacturing Test. | Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote |
| 1996 | VLSID | Practical Test and DFT for Next Generation VLSI. | Jacob A. Abraham, Gopi Ganapathy |
| 1996 | VLSID | On More Efficient Combinational ATPG Using Functional Learning. | Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell |
| 1996 | VTS | Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages. | Abhijit Chatterjee, Rathish Jayabharathi, Pankaj Pant, Jacob A. Abraham |
| 1996 | VTS | A novel test generation approach for parametric faults in linear analog circuits . | Hong Helena Zheng, Ashok Balivada, Jacob A. Abraham |
| 1995 | ICCD | Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. | Yatin Vasant Hoskote, Dinos Moundanos, Jacob A. Abraham |
| 1995 | VLSID | Efficient variable ordering and partial representation algorithm. | Jawahar Jain, Dinos Moundanos, James R. Bitner, Jacob A. Abraham, Donald S. Fussell, Don E. Ross |
| 1995 | VLSID | Efficient multisine testing of analog circuits. | Naveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham |
| 1995 | VTS | Verification of transient response of linear analog circuits. | Ashok Balivada, Yatin Vasant Hoskote, Jacob A. Abraham |
| 1994 | DAC | Microprocessor Testing: Which Technique is Best? (Panel). | Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther |
| 1994 | ICCAD | RAFT191486: a novel program for rapid-fire test and diagnosis of digital logic for marginal delays and delay faults. | Abhijit Chatterjee, Jacob A. Abraham |
| 1994 | ICCAD | Iterative [simulation-based genetics + deterministic techniques]= complete ATPG0. | Daniel G. Saab, Youssef Saab, Jacob A. Abraham |
| 1994 | ICCD | A New Asynchronous Multiplier Using Enable/Disable CMOS Differential Logic. | Edwin de Angel, Earl E. Swartzlander Jr., Jacob A. Abraham |
| 1994 | ICCD | A Signature Analyzer for Analog and Mixed-signal Circuits. | Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham |
| 1994 | ICCD | Architectural Performance Verification: PowerPC | S. Surya, Pradip Bose, Jacob A. Abraham |
| 1994 | VLSID | Verification of Circuits Described in VHDL through Extraction of Design Intent. | Yatin Vasant Hoskote, John Moondanos, Jacob A. Abraham, Donald S. Fussell |
| 1994 | VTS | Impact of behavioral modifications for testability. | Thomas Thomas, Praveen Vishakantaiah, Jacob A. Abraham |
| 1993 | DAC | VIPER: An Efficient Vigorously Sensitizable Path Extractor. | Hoon Chang, Jacob A. Abraham |
| 1993 | DAC | Selective Pseudo Scan: Combinational ATPG with Reduced Scan in a Full Custom RISC Microprocessor. | Gopi Ganapathy, Jacob A. Abraham |
| 1993 | DAC | DRAFTS: Discretized Analog Circuit Fault Simulator. | Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham |
| 1993 | ICCAD | Fault-based automatic test generator for linear analog circuits. | Naveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham |
| 1993 | ICCD | MIXER: Mixed-Signal Fault Simulator. | Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham |
| 1993 | ICCD | AMBIANT: Automatic Generation of Behavioral Modifications for Testability. | Praveen Vishakantaiah, Thomas Thomas, Jacob A. Abraham, Magdy S. Abadir |
| 1993 | ISSRE | Adding capability checks enhances error detection and isolation in object-based systems. | Nasser A. Kanawati, Ghani A. Kanawati, Jacob A. Abraham |
| 1993 | ITC | CHEETA: Composition of Hierarchical Sequential Tests Using ATKET. | Praveen Vishakantaiah, Jacob A. Abraham, Daniel G. Saab |
| 1993 | VLSID | Optimizations for Behavioral/RTL Simulation. | Sankaran Karthik, Jacob A. Abraham, Raymond P. Voith |
| 1993 | VTS | Generation of testable designs from behavioral descriptions using high level synthesis tools. | Kamal K. Varma, Praveen Vishakantaiah, Jacob A. Abraham |
| 1992 | DAC | Automatic Test Knowledge Extraction from VHDL (ATKET). | Praveen Vishakantaiah, Jacob A. Abraham, Magdy S. Abadir |
| 1992 | ICCAD | Automatic test generation for linear digital systems with bi-level search using matrix transform methods. | Rabindra K. Roy, Abhijit Chatterjee, Janak H. Patel, Jacob A. Abraham, Manuel A. d'Abreu |
| 1992 | ICCAD | CRIS: a test cultivation program for sequential VLSI circuits. | Daniel G. Saab, Youssef Saab, Jacob A. Abraham |
| 1992 | ICCD | Distributed VLSI Simulation on a Network of Workstations. | Sankaran Karthik, Jacob A. Abraham |
| 1992 | ITC | Sequential Redundancy Identification Using Verification Techniques. | John Moondanos, Jacob A. Abraham |
| 1992 | VTS | Hierarchical fault modeling for analog and mixed-signal circuits. | Naveena Nagi, Jacob A. Abraham |
| 1991 | ICCAD | Probabilistic Design Verification. | Jawahar Jain, James R. Bitner, Donald S. Fussell, Jacob A. Abraham |
| 1991 | ICCD | Interlock Schemes for Micropiplines: Application to a Self-Timed Rebound Sorter. | Sankaran Karthik, Indira de Souza, Joseph T. Rahmeh, Jacob A. Abraham |
| 1991 | ITC | High Quality Tests for Switch-Level Circuits Using Current and Logic Test Generation Algorithms. | Chun-Hung Chen, Jacob A. Abraham |
| 1991 | ITC | Hardware Acceleration Alone Will Not Make Fault Grading ULSI a Reality. | Gopi Ganapathy, Jacob A. Abraham |
| 1990 | DAC | Speed Up of Test Generation Using High-Level Primitives. | Ramachandra P. Kunda, Jacob A. Abraham, Bharat Deep Rathi, Prakash Narain |
| 1990 | ICCAD | SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction. | David T. Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham |
| 1990 | ICCAD | Mixed-Level Sequential Test Generation Using a Nine-Valued Relaxation Algorithm. | Chun-Hung Chen, Jacob A. Abraham |
| 1990 | ICCD | Automatic classification of node types in switch-level descriptions. | David T. Blaauw, Prithviraj Banerjee, Jacob A. Abraham |
| 1990 | ICCD | BiCMOS fault models: is stuck-at adequate? | Marc E. Levitt, Kaushik Roy, Jacob A. Abraham |
| 1990 | ICCD | Fault grading of large digital systems. | Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Joseph T. Rahmeh, Jacob A. Abraham |
| 1990 | ICPP | Forward Recovery Using Checkpointing in Parallel Systems. | Junsheng Long, W. Kent Fuchs, Jacob A. Abraham |
| 1990 | ITC | A study of faulty signatures using a matrix formulation. | John C. Chan, Jacob A. Abraham |
| 1990 | SC | Design of a scalable parallel switch-level simulator for VLSI. | Robert B. Mueller-Thuns, Daniel G. Saab, Jacob A. Abraham |
| 1989 | DAC | Automatic Generation of Behavioral Models from Switch-Level Descriptions. | David T. Blaauw, Daniel G. Saab, Robert B. Mueller-Thuns, Jacob A. Abraham, Joseph T. Rahmeh |
| 1989 | DAC | Average Interconnection Length and Interconnection Distribution Based on Rent's Rule. | Carol V. Gura, Jacob A. Abraham |
| 1989 | DAC | A Novel Approach to Accurate Timing Verification Using RTL Descriptions. | Kaushik Roy, Jacob A. Abraham |
| 1989 | ICCAD | Portable parallel logic and fault simulation. | Robert B. Mueller-Thuns, Daniel G. Saab, Robert F. Damiano, Jacob A. Abraham |
| 1989 | ICCAD | Synthesis of delay fault testable combinational logic. | Kaushik Roy, Jacob A. Abraham, Kaushik De, Stephen L. Lusky |
| 1989 | ITC | The Economics of Scan Design. | Marc E. Levitt, Jacob A. Abraham |
| 1989 | ITC | An Easily Computed Functional Level Testability Measure. | Kurt H. Thearling, Jacob A. Abraham |
| 1988 | DAC | Fault Simulation in a Distributed Environment. | Patrick A. Duba, Rabindra K. Roy, Jacob A. Abraham, William A. Rogers |
| 1988 | DAC | Improved Methods of Simulating RLC Couple and Uncoupled Transmission Lines Based on the Method of Characteristics. | Carol V. Gura, Jacob A. Abraham |
| 1988 | ICCAD | NCUBE: an automatic test generation program for iterative logic arrays. | Abhijit Chatterjee, Jacob A. Abraham |
| 1988 | ICCAD | Compaction of ATPG-generated test sequences for sequential circuits. | Rabindra K. Roy, Thomas M. Niermann, Janak H. Patel, Jacob A. Abraham, Resve A. Saleh |
| 1988 | ICCAD | CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits. | Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Jacob A. Abraham, Joseph T. Rahmeh |
| 1988 | ICPP | Fault-Tolerant Algorithms and Architectures for Real Time Signal Processing. | Jing-Yang Jou, Jacob A. Abraham |
| 1988 | ITC | DC_IATP : An Iterative Analog Circuit Test Generation Program for Generating DC Single Pattern Tests. | M. J. Marlett, Jacob A. Abraham |
| 1986 | DAC | Transistor-level test generation for physical failures in CMOS circuits. | Hsi-Ching Shih, Jacob A. Abraham |
| 1986 | ITC | Structured Functional Level Test Generation Using Binary Decision Diagrams. | Hongtao P. Chang, William A. Rogers, Jacob A. Abraham |
| 1986 | ITC | Approaches to Circuit Level Design for Testability. | Robert H. Fujii, Jacob A. Abraham |
| 1986 | RTSS | A Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems. | Prithviraj Banerjee, Jacob A. Abraham |
| 1986 | SRDS | Low-Cost Comparison and Diagnosis of Large Remotely Located Files. | W. Kent Fuchs, Kun-Lung Wu, Jacob A. Abraham |
| 1985 | ISCA | TIDBITS: Speedup Via Time-Delay Bit-Slicing in ALU Design for VLSI Technology. | Peter Y.-T. Hsu, Joseph T. Rahmeh, Edward S. Davidson, Jacob A. Abraham |
| 1985 | ITC | Self-Test for Microprocessors. | Robert H. Fujii, Jacob A. Abraham |
| 1985 | ITC | CHIEFS : A Concurrent, Hierarchical and Extensible Fault Simulator. | William A. Rogers, Jacob A. Abraham |
| 1984 | ISCA | Fault-Secure Algorithms for Multiple-Processor Systems. | Prithviraj Banerjee, Jacob A. Abraham |
| 1984 | ITC | Design of Test Pattern Generators for Built-In Test. | Ramaswami Dandapani, Janak H. Patel, Jacob A. Abraham |
| 1983 | ISCA | Concurrent Error Detection in VLSI Interconnection Networks | W. Kent Fuchs, Jacob A. Abraham, Kuang-Hua Huang |
| 1983 | ISCA | Adaptive Interpretation as a Means of Exploiting Complex Instruction Sets | Richard L. Norton, Jacob A. Abraham |
| 1983 | ITC | Incorporating Test Technology into an Undergraduate Curriculum. | Jacob A. Abraham |
| 1983 | ITC | Generating Tests for Physical Failures in MOS Logic Circuits. | Prithviraj Banerjee, Jacob A. Abraham |
| 1982 | DAC | Test generation for programmable logic arrays. | Pradip Bose, Jacob A. Abraham |
| 1982 | ICPP | Efficient parallel algorithms for processor arrays. | Kuang-Hua Huang, Jacob A. Abraham |
| 1982 | ICPP | Using write back cache to improve performance of multi-user multiprocessors. | Richard L. Norton, Jacob A. Abraham |
| 1981 | ITC | Functional Level Test Generation for Complex Digital Systems. | Jacob A. Abraham |