Skip to content

Matteo Sonza Reorda

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

258

Venues

28

Active years

1988–2026

Best venue rank

A*

Where they publish

Papers

258 indexed papers, newest first.

YearVenueTitleAuthors
2026IOLTSAlgorithm-based Fault Tolerance for RISC-V Vector Processors in Safety-critical AI Applications.Sergiu-Mohamed Abed, Ahmet Cagri Bagbaba, Connie O'Shea, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2026IOLTSFrom Prompts to Pressure: Evaluating LLM-driven Agents for GPU Stress-code Generation.Aurora Gensale, Giuseppe Esposito, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Luca Cagliero, Matteo Sonza Reorda
2026IOLTSEarly-Stage Reliability Assessment of Tensor-Based Deep Learning Accelerators.Robert Limas Sierra, Alessandro Veronesi, Josie E. Rodriguez Condia, Letcia Maria Bolzani Phls, Matteo Sonza Reorda
2026VTSSpecial Session: Reliability Assessment of DNN Models and Inference on Systolic Arrays.Natalia Cherezova, Salvatore Pappalardo, Annachiara Ruospo, Bastien Deveautour, Lorenzo Fezza, Artur Jutman, Ernesto Snchez, Alberto Bosio, Matteo Sonza Reorda, Maksim Jenihhin
2026VTSFT-Sparse: Algorithm-Based Fault Tolerance for Sparse CNNs Using Structured Sparsity in GPUs.Josie E. Rodriguez Condia, Mohammad Hasan Ahmadilivani, Jaan Raik, Maksim Jenihhin, Matteo Sonza Reorda
2026VTSLate Breaking Results - New Techniques for Software Test Library Compaction.Nikolaos Ioannis Deligiannis, Michelangelo Bartolomucci, Mansour Sohrabian, Riccardo Cantoro, Matteo Sonza Reorda
2026VTSA Flexible Framework for Vector Accelerators In-field Testing.Gustavo Vilar de Farias, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2025DDECSAnalysis and Mitigation of Soft-errors in GPU-accelerated Hyperspectral Image Classifiers.Sergiu-Mohamed Abed, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Gianluca De Lucia, Marco Lapegna, Matteo Sonza Reorda
2025DSDTowards RISC-V-based HPC: The Italian Pathfinding Activities in the DARE-SGA1 Project.Giovanni Agosta, Marco Aldinucci, Andrea Bartolini, Laura Bellentani, Andrea Biagioni, Daniele Cesarini, Carlotta Chiarini, Iacopo Colonnelli, Pietro Delugas, Lev Denisov, Ottorino Frezza, Marco Grangetto, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Andrea Maslov, Mauro Olivieri, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Davide Rossi, Sergio Saponara, Antonio Sciarappa, Francesco Simula, Matteo Sonza Reorda, Massimo Torquati, Piero Vicini
2025DSDNon-Functional Properties in HPC Systems: Design Exploration of Energy, Power, and Reliability.Giovanni Agosta, Enrico Bini, Davide Baroffio, Carlo Brandolese, Michele Castrovilli, Daniele Cattaneo, Daniele Cesarini, William Fornaciari, Andrea Galimberti, Alberto Garfagnini, Arsenii Gavrikov, Francesco Iannone, Marco Lapegna, Tomas Antonio Lpez, Gabriele Magnani, Gabriele Mencagli, Cecilia Metra, Martin Eugenio Omana, Filippo Palombi, Federico Reghenzani, Josie E. Rodriguez Condia, A. Serafini, Matteo Sonza Reorda, Davide Zoni, Giuseppe Zummo
2025ETSEuropean Test Symposium Teams: an Anniversary Snapshot.Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025IOLTSAI-Based Classification of Adversarial Attacks vs. Hardware Fault Corruptions in the Split Computing Context.Giuseppe Esposito, Enrico Magliano, Nicola Scarano, Tamer Ahmed Eltaras, Juan-David Guerrero-Balaguera, Luca Mannella, Josie E. Rodriguez Condia, Annachiara Ruospo, Stefano Di Carlo, Marco Levorato, Alessandro Savino, Matteo Sonza Reorda
2025IOLTSGPD: Predictive Control Flow Error Detection Leveraging Data Flow Error Detection Methods.Raghunandana K. K, Yogesh Prasad K. R, Matteo Sonza Reorda, Virendra Singh
2025ITCA Benchmark Suite to Evaluate DNN's Resilience.Cristiana Bolchini, Alberto Bosio, Luca Cassano, Antonio Miele, Salvatore Pappalardo, Dario Passariello, Annachiara Ruospo, Ernesto Snchez, Matteo Sonza Reorda, Vittorio Turco
2025ITCExploiting the correlation with traditional fault models to speed-up cell-aware fault simulation.Reza Khoshzaban, Iacopo Guglielminetti, Michelangelo Grosso, Matteo Sonza Reorda, Riccardo Cantoro
2024DDECSEvaluating the Reliability of Integer Multipliers With Respect to Permanent Faults.Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda, Serag E.-D. Habib
2024DDECSTCC: GPGPU Architecture for Instruction Decoder and Control Flow Error Detection.Raghunandana K. K, Yogesh Prasad K. R, Matteo Sonza Reorda, Virendra Singh
2024DDECSEarly Detection of Permanent Faults in DNNs Through the Application of Tensor-Related Metrics.Vittorio Turco, Annachiara Ruospo, Ernesto Snchez, Matteo Sonza Reorda
2024ETSAssessing the Effectiveness of Software-Based Self-Test Programs for Static Cell-Aware Test.Riccardo Cantoro, Michelangelo Grosso, Iacopo Guglielminetti, Reza Khoshzaban, Matteo Sonza Reorda
2024ETSAnalyzing the Structural and Operational Impact of Faults in Floating-Point and Posit Arithmetic Cores for CNN Operations.Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Robert Limas Sierra, Matteo Sonza Reorda
2024IOLTSFault Grading Techniques for Evaluating Software-Based Self-Test with Respect to Small Delay Defects.Michelangelo Bartolomucci, Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda
2024IOLTSEnhancing the Reliability of Split Computing Deep Neural Networks.Giuseppe Esposito, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Marco Levorato, Matteo Sonza Reorda
2024IOLTSEffective Application-level Error Modeling of Permanent Faults on AI Accelerators.Francesco Pessia, Juan-David Guerrero-Balaguera, Robert Limas Sierra, Josie E. Rodriguez Condia, Marco Levorato, Matteo Sonza Reorda
2024VTSSpecial Session: Reliability Assessment Recipes for DNN Accelerators.Mohammad Hasan Ahmadilivani, Alberto Bosio, Bastien Deveautour, Fernando Fernandes dos Santos, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Salvatore Pappalardo, Jaan Raik, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Mahdi Taheri, Marcello Traiola
2024VTSEvaluating the Reliability of Supervised Compression for Split Computing.Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Marco Levorato, Matteo Sonza Reorda
2024VTSAnalyzing the Impact of Scheduling Policies on the Reliability of GPUs Running CNN Operations.Robert Limas Sierra, Juan-David Guerrero-Balaguera, Francesco Pessia, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2023DATEAssessing Convolutional Neural Networks Reliability through Statistical Fault Injections.Annachiara Ruospo, Gabriele Gavarini, Corrado De Sio, Juan-David Guerrero-Balaguera, Luca Sterpone, Matteo Sonza Reorda, Ernesto Snchez, Riccardo Mariani, Joseph Aribido, Jyotika Athavale
2023DDECSCollecting diagnostic information through dichotomic search from Logic BIST of failing in-field automotive SoCs with delay faults.Paolo Bernardi, Gabriele Filipponi, Matteo Sonza Reorda, Davide Appello, Claudia Bertani, Vincenzo Tancorre
2023DDECSA Reliability-aware Environment for Design Exploration for GPU Devices.Robert Limas Sierra, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2023DSDTargeting different defect-oriented fault models in IC testing: an experimental approach.Nunzio Mirabella, Andrea Floridia, Riccardo Cantoro, Michelangelo Grosso, Matteo Sonza Reorda
2023ETSA Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors.Jens Anders, Pablo Andreu, Bernd Becker, Steffen Becker, Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Nourhan Elhamawy, Tobias Faller, Carles Hernndez, Nele Mentens, Mahnaz Namazi Rizi, Ilia Polian, Abolfazl Sajadi, Matthias Sauer, Denis Schwachhofer, Matteo Sonza Reorda, Todor Stefanov, Ilya Tuzov, Stefan Wagner, Nusa Zidaric
2023ETSEvaluating the Prevalence of SFUs in the Reliability of GPUs.Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Edward Javier Patio Nuez, Robert Limas Sierra, Matteo Sonza Reorda
2023ETSAutomating the Generation of Functional Stress Inducing Stimuli for Burn-In Testing.Nikolaos Ioannis Deligiannis, Tobias Faller, Chenghan Zhou, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda
2023ETSConstraint-Based Automatic SBST Generation for RISC-V Processor Families.Tobias Faller, Nikolaos Ioannis Deligiannis, Markus Schwrer, Matteo Sonza Reorda, Bernd Becker
2023ETSImage Test Libraries for the on-line self-test of functional units in GPUs running CNNs.Annachiara Ruospo, Gabriele Gavarini, A. Porsia, Matteo Sonza Reorda, Ernesto Snchez, Riccardo Mariani, Joseph Aribido, Jyotika Athavale
2023IOLTSTREFU: An Online Error Detecting and Correcting Fault Tolerant GPGPU Architecture.Raghunandana K. K, B. K. S. V. L. Varaprasad, Matteo Sonza Reorda, Virendra Singh
2023SCUnderstanding the Effects of Permanent Faults in GPU's Parallelism Management and Control Units.Juan-David Guerrero-Balaguera, Josie Esteban Rodriguez Condia, Fernando Fernandes dos Santos, Matteo Sonza Reorda, Paolo Rech
2023VLSIDEvaluating the Impact of Transition Delay Faults in GPUs.Josie E. Rodriguez Condia, Matteo Sonza Reorda
2022DATEA Compaction Method for STLs for GPU in-field test.Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2022DSNImproving the Fault Resilience of Neural Network Applications Through Security Mechanisms.Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea
2022ETSMachine Learning for Test, Diagnosis, Post-Silicon Validation and Yield Optimization.Hussam Amrouch, Krishnendu Chakrabarty, Dirk Pflger, Ilia Polian, Matthias Sauer, Matteo Sonza Reorda
2022ETSTest, Reliability and Functional Safety Trends for Automotive System-on-Chip.Francesco Angione, Davide Appello, Joseph Aribido, Jyotika Athavale, Nicol Bellarmino, Paolo Bernardi, Riccardo Cantoro, Corrado De Sio, Tommaso Foscale, Gabriele Gavarini, Juan-David Guerrero-Balaguera, Martin Huch, Giusy Iaria, Tobias Kilian, Riccardo Mariani, Raffaele Martone, Annachiara Ruospo, Ernesto Snchez, Ulf Schlichtmann, Giovanni Squillero, Matteo Sonza Reorda, Luca Sterpone, Vincenzo Tancorre, Roberto Ugioli
2022ETSAn Optimized Burn-In Stress Flow targeting Interconnections logic to Embedded Memories in Automotive Systems-on-Chip.Francesco Angione, Paolo Bernardi, Gabriele Filipponi, Matteo Sonza Reorda, Davide Appello, Vincenzo Tancorre, Roberto Ugioli
2022ETSEffective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries.Riccardo Cantoro, Francesco Garau, Patrick Girard, Nima Kolahimahmoudi, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel
2022IOLTSRecent Trends and Perspectives on Defect-Oriented Testing.Paolo Bernardi, Riccardo Cantoro, Anthony Coyette, W. Dobbeleare, Moritz Fieback, Andrea Floridia, G. Gielenk, Jhon Gomez, Michelangelo Grosso, Andrea Guerriero, Iacopo Guglielminetti, Said Hamdioui, Giorgio Insinga, N. Mautone, Nunzio Mirabella, Sandro Sartoni, Matteo Sonza Reorda, Rudolf Ullmann, Ronny Vanhooren, N. Xamak, Lizhou Wu
2022IOLTSEffective fault simulation of GPU's permanent faults for reliability estimation of CNNs.Juan-David Guerrero-Balaguera, Robert Limas Sierra, Matteo Sonza Reorda
2022ITCA Multi-level Approach to Evaluate the Impact of GPU Permanent Faults on CNN's Reliability.Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Fernando Fernandes dos Santos, Matteo Sonza Reorda, Paolo Rech
2022ITCIn-field Data Collection System through Logic BIST for large Automotive Systems-on-Chip.Gabriele Filipponi, Giusy Iaria, Matteo Sonza Reorda, Davide Appello, Giuseppe Garozzo, Vincenzo Tancorre
2022VTSExploiting post-silicon debug hardware to improve the fault coverage of Software Test Libraries.Riccardo Cantoro, Francesco Garau, Riccardo Masante, Sandro Sartoni, Virendra Singh, Matteo Sonza Reorda
2022VTSA New Method to Generate Software Test Libraries for In-Field GPU Testing Resorting to High-Level Languages.Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2021DDECSOn the Functional Test of Special Function Units in GPUs.Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2021DSDMaximizing the Switching Activity of Different Modules Within a Processor Core via Evolutionary Techniques.Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda
2021DSNRevealing GPUs Vulnerabilities by Combining Register-Transfer and Software-Level Fault Injection.Fernando Fernandes dos Santos, Josie E. Rodriguez Condia, Luigi Carro, Matteo Sonza Reorda, Paolo Rech
2021IOLTSSystem-Level Test: State of the Art and Challenges.Davide Appello, H. H. Chen, Matthias Sauer, Ilia Polian, Paolo Bernardi, Matteo Sonza Reorda
2021IOLTSSelf-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement.Riccardo Cantoro, Patrick Girard, Riccardo Masante, Sandro Sartoni, Matteo Sonza Reorda, Arnaud Virazel
2021IOLTSProtecting GPU's Microarchitectural Vulnerabilities via Effective Selective Hardening.Josie E. Rodriguez Condia, Paolo Rech, Fernando Fernandes dos Santos, Luigi Carro, Matteo Sonza Reorda
2021VTSCombining Architectural Simulation and Software Fault Injection for a Fast and Accurate CNNs Reliability Evaluation on GPUs.Josie E. Rodriguez Condia, Fernando Fernandes dos Santos, Matteo Sonza Reorda, Paolo Rech
2021VTSNew Techniques for the Automatic Identification of Uncontrollable Lines in a CPU Core.Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matthias Sauer, Bernd Becker, Matteo Sonza Reorda
2020DATERESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems.Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendrfer, Christian Sauer, Anton Klotz, Michael Hbner, Jrg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka
2020DDECSApplicative System Level Test introduction to Increase Confidence on Screening Quality.Paolo Bernardi, Marco Restifo, Matteo Sonza Reorda, Davide Appello, Claudia Bertani, D. Petrali
2020DDECSA dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs.Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone
2020ETSDetermined-Safe Faults Identification: A step towards ISO26262 hardware compliant designs.Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Sandro Sartoni, Riccardo Cantoro, Matteo Sonza Reorda, Said Hamdioui, Christian Sauer
2020IOLTSOn the testing of special memories in GPGPUs.Josie E. Rodriguez Condia, Matteo Sonza Reorda
2020ITCNew Perspectives on Core In-field Path Delay Test.Riccardo Cantoro, Dario Foti, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan
2020VTSIn-field Functional Test of CAN Bus Controllers.Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda
2020VTSA dynamic reconfiguration mechanism to increase the reliability of GPGPUs.Josie E. Rodriguez Condia, Pierpaolo Narducci, Matteo Sonza Reorda, Luca Sterpone
2020VTSSpecial Session: AutoSoC - A Suite of Open-Source Automotive SoC Benchmarks.Felipe Augusto da Silva, Ahmet Cagri Bagbaba, Annachiara Ruospo, Riccardo Mariani, Ghani Kanawati, Ernesto Snchez, Matteo Sonza Reorda, Maksim Jenihhin, Said Hamdioui, Christian Sauer
2019DDECSEffective Screening of Automotive SoCs by Combining Burn-In and System Level Test.F. Almeida, Paolo Bernardi, D. Calabrese, Marco Restifo, Matteo Sonza Reorda, Davide Appello, Giorgio Pollaccia, Vincenzo Tancorre, Roberto Ugioli, Gulio Zoppi
2019DDECSOn the in-field test of the GPGPU scheduler memory.Stefano Di Carlo, Josie E. Rodriguez Condia, Matteo Sonza Reorda
2019DDECSNew categories of Safe Faults in a processor-based Embedded System.Cemil Cem Grsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar
2019ETSA Dynamic Greedy Test Scheduler for Optimizing Probe Motion in In-Circuit Testers.Luciano Bonaria, Maurizio Raganato, Matteo Sonza Reorda, Giovanni Squillero
2019IOLTSTesting permanent faults in pipeline registers of GPGPUs: A multi-kernel approach.Josie E. Rodriguez Condia, Matteo Sonza Reorda
2019ITCIEEE European Test Symposium (ETS).Stephan Eggersgl, Said Hamdioui, Artur Jutman, Maria K. Michael, Jaan Raik, Matteo Sonza Reorda, Mehdi Baradaran Tahoori, Elena-Ioana Vatajelu
2018DDECSAn Evolutionary Technique for Reducing the Duration of Reconfigurable Scan Network Test.Riccardo Cantoro, Luigi San Paolo, Matteo Sonza Reorda, Giovanni Squillero
2018IOLTSOn the test of a COTS-based system for space applications.Sara Carbonara, Andrea Firrincieli, Matteo Sonza Reorda, Jan-Gerd Mess
2018IOLTSAbout the functional test of the GPGPU scheduler.Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone
2018IOLTSFault-Independent Test-Generation for Software-Based Self-Testing.Panagiotis Georgiou, Xrysovalantis Kavousianos, Riccardo Cantoro, Matteo Sonza Reorda
2018IOLTSTowards an automatic approach for hardware verification according to ISO 26262 functional safety standard.Jacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson
2018ITCA New Technique to Generate Test Sequences for Reconfigurable Scan Networks.Riccardo Cantoro, Aleksa Damljanovic, Matteo Sonza Reorda, Giovanni Squillero
2017DATEBASTION: Board and SoC test instrumentation for ageing and no failure found.Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke
2017IOLTSOn the in-field test of embedded memories.Paolo Bernardi, Marco Restifo, Ernesto Snchez, Matteo Sonza Reorda
2016DDECSFPGA-controlled PCBA power-on self-test using processor's debug features.Boyang Du, Ernesto Snchez, Matteo Sonza Reorda, Julio Prez Acle, Anton Tsertov
2016DDECSAn effective approach for functional test programs compaction.Aymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda
2016ETSOn the diagnostic analysis of IEEE 1687 networks.Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson
2016ETSA low-cost susceptibility analysis methodology to selectively harden logic circuits.Imran Wali, Bastien Deveautour, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2016IOLTSOn the robustness of DCT-based compression algorithms for space applications.Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Grschwin Fey, Jan-Gerd Mess, Robert Schmidt
2016IOLTSAutomatic generation of stimuli for fault diagnosis in IEEE 1687 networks.Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson
2016ITCA suite of IEEE 1687 benchmark networks.Anton Tsertov, Artur Jutman, Sergei Devadze, Matteo Sonza Reorda, Erik Larsson, Farrokh Ghani Zadegan, Riccardo Cantoro, Mehrdad Montazeri, Rene Krenz-Baath
2016VTSEffective generation and evaluation of diagnostic SBST programs.Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker
2015DATEOn the automatic generation of SBST test programs for in-field test.Andreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker
2015DATEExploring the impact of functional test programs re-used for power-aware testing.Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda
2015ETSOn test program compaction.Marco Gaudesi, Matteo Sonza Reorda, Irith Pomeranz
2015IOLTSOn the maximization of the sustained switching activity in a processor.Riccardo Cantoro, Matteo Sonza Reorda, Alireza Rohani, Hans G. Kerkhoff
2015IOLTSDesign space exploration and optimization of a Hybrid Fault-Tolerant Architecture.Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2014DATEGPGPUs: How to combine high computational power with high reliability.Leonardo Arturo Bautista-Gomez, Franck Cappello, Luigi Carro, Nathan DeBardeleben, Bo Fang, Sudhanva Gurumurthi, Karthik Pattabiraman, Paolo Rech, Matteo Sonza Reorda
2014DATEAn effective approach to automatic functional processor test generation for small-delay faults.Andreas Riefert, Lyl M. Ciganda, Matthias Sauer, Paolo Bernardi, Matteo Sonza Reorda, Bernd Becker
2014DDECSOn the in-field test of Branch Prediction Units using the correlated predictor mechanism.Marco Gaudesi, S. Saleem, Ernesto Snchez, Matteo Sonza Reorda, E. Tanowe
2014IOLTSFault injection in GPGPU cores to validate and debug robust parallel applications.M. De Carvalho, Davide Sabena, Matteo Sonza Reorda, Luca Sterpone, Paolo Rech, Luigi Carro
2014IOLTSA new solution to on-line detection of Control Flow Errors.Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-Garca, Almudena Lindoso, Luis Entrena
2014IOLTSPermanent faults on LIN networks: On-line test generation.Anna Vaskova, Marta Portela-Garca, Mario Garca-Valderas, Celia Lpez-Ongil, Matteo Sonza Reorda
2014VTSSpecial session 8B - Panel: In-field testing of SoC devices: Which solutions by which players?Jacob A. Abraham, Xinli Gu, Teresa MacLaurin, Janusz Rajski, Paul G. Ryan, Dimitris Gizopoulos, Matteo Sonza Reorda
2013DATEReliability analysis reloaded: how will we survive?Robert C. Aitken, Grschwin Fey, Zbigniew T. Kalbarczyk, Frank Reichenbach, Matteo Sonza Reorda
2013DATEOn-line functionally untestable fault identification in embedded processor cores.Paolo Bernardi, Michele Bonazza, Ernesto Snchez, Matteo Sonza Reorda, Oscar Ballan
2013DDECSOn the on-line functional test of the Reorder Buffer memory in superscalar processors.Stefano Di Carlo, Ernesto Snchez, Matteo Sonza Reorda
2013ETSAn error-detection and self-repairing method for dynamically and partially reconfigurable systems.Matteo Sonza Reorda, Luca Sterpone, Anees Ullah
2013IOLTSIncreasing fault coverage during functional test in the operational phase.Mauricio de Carvalho, Paolo Bernardi, Ernesto Snchez, Matteo Sonza Reorda, Oscar Ballan
2013IOLTSExploiting the debug interface to support on-line test of control flow errors.Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-Garca, Almudena Lindoso, Luis Entrena
2013IOLTSHardening of serial communication protocols for potentially critical systems in automotive applications: LIN bus.Anna Vaskova, Marta Portela-Garca, Matteo Sonza Reorda
2012DATEA new SBST algorithm for testing the register file of VLIW processors.Davide Sabena, Matteo Sonza Reorda, Luca Sterpone
2012DDECSA SBST strategy to test microprocessors' Branch Target Buffer.Paolo Bernardi, Lyl M. Ciganda, Michelangelo Grosso, Ernesto Snchez, Matteo Sonza Reorda
2012DDECSOn-line test of embedded systems: Which role for functional test?Matteo Sonza Reorda
2012ETSOn-line software-based self-test of the Address Calculation Unit in RISC processors.Paolo Bernardi, Lyl M. Ciganda, Mauricio de Carvalho, Michelangelo Grosso, Jorge Luis Lagos-Benites, Ernesto Snchez, Matteo Sonza Reorda, Oscar Ballan
2012IOLTSOn the functional test of L2 caches.Michele Riga, Ernesto Snchez, Matteo Sonza Reorda
2012PDPA New Fault Injection Approach for Testing Network-on-Chips.Luca Sterpone, Davide Sabena, Matteo Sonza Reorda
2011DDECSOptimized embedded memory diagnosis.Mauricio de Carvalho, Paolo Bernardi, Matteo Sonza Reorda, Nicola Campanelli, Tamas Kerekes, Davide Appello, Mario Barone, Vincenzo Tancorre, Marco Terzi
2011DDECSFault injection analysis of transient faults in clustered VLIW processors.Luca Sterpone, Davide Sabena, Salvatore Campagna, Matteo Sonza Reorda
2011ETSA Low-Cost Emulation System for Fast Co-verification and Debug.Jorge Luis Lagos-Benites, Michelangelo Grosso, Luca Sterpone, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini
2011ETSA Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing.Miroslav Valka, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Ernesto Snchez, Mauricio de Carvalho, Matteo Sonza Reorda
2011IOLTSAn effective methodology for on-line testing of embedded microprocessors.Paolo Bernardi, Lyl M. Ciganda, Ernesto Snchez, Matteo Sonza Reorda
2010DDECSCumulative embedded memory failure bitmap display & analysis.Nicola Campanelli, Tamas Kerekes, Paolo Bernardi, Mauricio de Carvalho, Alessandro Panariti, Matteo Sonza Reorda, Davide Appello, Mario Barone
2010DDECSA hardware accelerated framework for the generation of design validation programs for SMT processors.Danilo Ravotto, Ernesto Snchez, Matteo Sonza Reorda
2010ETSAn adaptive tester architecture for volume diagnosis.Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda
2010ETSA software-based self-test methodology for system peripherals.Michelangelo Grosso, Wilson J. Prez H., Danilo Ravotto, Edgar E. Snchez, Matteo Sonza Reorda, Jaime Velasco-Medina
2010IOLTSAn on-line fault detection technique based on embedded debug features.Michelangelo Grosso, Matteo Sonza Reorda, Marta Portela-Garca, Mario Garca-Valderas, Celia Lpez-Ongil, Luis Entrena
2010IOLTSAnalysis of root causes of alpha sensitivity variations on microprocessors manufactured using different cell layouts.Paolo Rech, Michelangelo Grosso, Fabio Melchiori, Domenico Loparco, Davide Appello, Luigi Dilillo, Alessandro Paccagnella, Matteo Sonza Reorda
2010ISCASA novel scalable and reconfigurable emulation platform for embedded systems verification.M. Di Marzio, Michelangelo Grosso, Matteo Sonza Reorda, Luca Sterpone, G. Audisio, Marco Sabatini
2010ITCA programmable BIST for DRAM testing and diagnosis.Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda, Y. Zhang
2010ITCA tester architecture suitable for MEMS calibration and testing.Lyl M. Ciganda Brasca, Paolo Bernardi, Matteo Sonza Reorda, Dimitri Barbieri, Maurizio Straiotto, Luciano Bonaria
2009DATEA low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips.Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009DDECSAn efficient fault simulation technique for transition faults in non-scan sequential circuits.Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda
2009DDECSAn enhanced FPGA-based low-cost tester platform exploiting effective test data compression for SoCs.Lyl M. Ciganda, Francesco Abate, Paolo Bernardi, M. Bruno, Matteo Sonza Reorda
2009ETSAutomatic Functional Stress Pattern Generation for SoC Reliability Characterization.Davide Appello, Paolo Bernardi, R. Cagliesi, M. Giancarlini, Michelangelo Grosso, Edgar E. Snchez, Matteo Sonza Reorda
2009IOLTSExploiting embedded FPGA in on-line software-based test strategies for microprocessor cores.Michelangelo Grosso, Matteo Sonza Reorda
2009IOLTSEvaluating Alpha-induced soft errors in embedded microprocessors.Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda, Davide Appello
2009VTSDfT Reuse for Low-Cost Radiation Testing of SoCs: A Case Study.Davide Appello, Paolo Bernardi, Simone Gerardin, Michelangelo Grosso, Alessandro Paccagnella, Paolo Rech, Matteo Sonza Reorda
2008DATEAn novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers.Paolo Bernardi, Matteo Sonza Reorda
2008DDECSSoftware-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs.Wilson J. Prez H., Jaime Velasco-Medina, Danilo Ravotto, Edgar E. Snchez, Matteo Sonza Reorda
2008IOLTSA Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.Wilson J. Prez H., Jaime Velasco-Medina, Danilo Ravotto, Edgar E. Snchez, Matteo Sonza Reorda
2008VTSA Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.Kyriakos Christou, Maria K. Michael, Paolo Bernardi, Michelangelo Grosso, Ernesto Snchez, Matteo Sonza Reorda
2007DATEInteractive presentation: An enhanced technique for the automatic generation of effective diagnosis-oriented test programs for processor.Ernesto Snchez, Massimiliano Schillaci, Giovanni Squillero, Matteo Sonza Reorda
2007DDECSExtended Fault Detection Techniques for Systems-on-Chip.Paolo Bernardi, Letcia Maria Veiras Bolzani, Matteo Sonza Reorda
2007ETSOn the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores.Paolo Bernardi, Michelangelo Grosso, Ernesto Snchez, Matteo Sonza Reorda
2007IOLTSA Hybrid Approach to Fault Detection and Correction in SoCs.Paolo Bernardi, Letcia Maria Veiras Bolzani, Matteo Sonza Reorda
2007IOLTSAn Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores.Letcia Maria Veiras Bolzani, Ernesto Snchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero
2007IOLTSSelf Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
2006CECAn Evolutionary Methodology to Enhance Processor Software-Based Diagnosis.Paolo Bernardi, Ernesto Snchez, Massimiliano Schillaci, Giovanni Squillero, Matteo Sonza Reorda
2006DATEAn effective technique for minimizing the cost of processor software-based diagnosis in SoCs.Paolo Bernardi, Ernesto Snchez, Massimiliano Schillaci, Giovanni Squillero, Matteo Sonza Reorda
2006ETSFault Injection-based Reliability Evaluation of SoPCs.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-Garca, Celia Lpez-Ongil, Luis Entrena
2006IOLTSHardware-in-the-Loop-Based Dependability Analysis of Automotive Systems.Matteo Sonza Reorda, Massimo Violante
2006ITCEmbedded Memory Diagnosis: An Industrial Workflow.Davide Appello, Vincenzo Tancorre, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2006VTSOn the Automation of the Test Flow of Complex SoCs.Davide Appello, Vincenzo Tancorre, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2006VTSA Pattern Ordering Algorithm for Reducing the Size of Fault Dictionaries.Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2005DATEOn the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs.Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Carro, Matteo Sonza Reorda
2005DSNOn-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core.Paolo Bernardi, Letcia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2005ETSExploiting an infrastructure IP to reduce memory diagnosis costs in SoCs.Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda
2005ETSMultiple errors produced by single upsets in FPGA configuration memory: a possible solution.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2005GECCONew evolutionary techniques for test-program generation for complex microprocessor cores.Ernesto Snchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante
2005IOLTSIntegrating BIST Techniques for On-Line SoC Testing.Alberto Manzone, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Ernesto Snchez, Matteo Sonza Reorda
2005IOLTSEfficient Estimation of SEU Effects in SRAM-Based FPGAs.Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2004DATEEvaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA.M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin
2004DATETesting Logic Cores using a BIST P1500 Compliant Approach: A Case of Study.Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda
2004DATEAutomatic Generation of Validation Stimuli for Application-Specific Processors.Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2004IOLTSOn the Evaluation of SEU Sensitiveness in SRAM-Based FPGAs.Paolo Bernardi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante
2004IOLTSHybrid Soft Error Detection by Means of Infrastructure IP Cores.Letcia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante
2004ITCEvaluating the Effects of Transient Faults on Vehicle Dynamic Performance in Automotive Systems.Fulvio Corno, Matteo Sonza Reorda, Simonluca Tosato, F. Esposito
2003DATEA P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories.Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003DATEFully Automatic Test Program Generation for Microprocessor Cores.Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
2003DATEAn Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2003ETFAAn efficient algorithm for the extraction of compressed diagnostic information from embedded memory cores.Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda
2003ETSCode generation for functional validation of pipelined microprocessors.Fulvio Corno, Giovanni Squillero, Matteo Sonza Reorda
2003FPLEmulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits.Matteo Sonza Reorda, Massimo Violante
2003IOLTSAn RT-level Concurrent Error Detection Technique for Data Dominated Systems.Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2003IOLTSAccurate and Efficient Analysis of Single Event Transients in VLSI Circuits.Matteo Sonza Reorda, Massimo Violante
2003IOLTSIntroducing SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: Are They A Good Remedy?Fabian Vargas, Diogo B. Brum, Drcio Prestes, Letcia Maria Veiras Bolzani, Eduardo Luis Rhod, Matteo Sonza Reorda
2003IOLTSAnalyzing SEU Effects in SRAM-based FPGAs.Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori
2003ITCExploiting Programmable BIST For The Diagnosis of Embedded Memory Cores.Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante
2003SACAutomatic Test Program Generation for Pipeline Processors.Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
2002CECEfficient machine-code test-program induction.Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda, Giovanni Squillero
2002DATENew Techniques for Speeding-Up Fault-Injection Campaigns.Luis Berrojo, Isabel Gonzlez, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Luis Entrena, Celia Lpez
2002FPLSimulation-Based Analysis of SEU Effects on SRAM-based FPGAs.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002IOLTSA BIST-Based Solution for the Diagnosis of Embedded Memories Adopting Image Processing Techniques.Davide Appello, Alessandra Fudoli, Vincenzo Tancorre, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda
2002IOLTSAnalysis of the Equivalences and Dominances of Transient Faults at the RT Level.Luis Berrojo, Isabel Gonzlez, Luis Entrena, Celia Lpez, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2002IOLTSAnalysis of SEU Effects in a Pipelined Processor.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2002SACAn evolutionary algorithm for reducing integrated-circuit test application time.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2002VTSAn Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation.Luis Berrojo, Isabel Gonzlez, Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Luis Entrena, Celia Lpez
2001DATESystem safety through automatic high-level code transformations: an experimental evaluation.Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001DATEOn the test of microprocessor IP cores.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2001FPLFPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001IOLTSExploiting FPGA for Accelerating Fault Injection Experiments.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001IOLTSEffectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study.Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda
2001SACEvolving effective CA/CSTP: BIST architectures for sequential circuits.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2001VLSIDEarly Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs.Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante
2001SCAMA Source-to-Source Compiler for Generating Dependable Software.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano
2000CECExploiting the Selfish Gene algorithm for evolving hardware cellular automata.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2000DATEAutomatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Alberto Manzone, Alessandro Pincetti
2000DATEEvaluating System Dependability in a Co-Design Framework.Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000ETSCA-CSTP: a new BIST architecture for sequential circuits.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000ETSSystem-level test bench generation in a co-design framework.Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno
2000IJCNNExploiting the Selfish Gene Algorithm for Evolving Cellular Automata.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2000IOLTSNew Techniques for Accelerating Fault Injection in VHDL Descriptions.B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2000IOLTSEvaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures.Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, Bogdan Nicolescu, Raoul Velazco
2000ISCASAn improved cellular automata-based BIST architecture for sequential circuits.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2000ICTAIA genetic algorithm-based system for generating test programs for microprocessor IP cores.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000VTSLow Power BIST via Non-Linear Hybrid Cellular Automata.Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante
2000VTSHigh-Level Observability for Effective High-Level ATPG.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
2000SAFECOMPSpeeding-Up Fault Injection Campaigns in VHDL Models.B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999CECVerifying the equivalence of sequential circuits with genetic algorithms.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
1999CECOptimizing deceptive functions with the SG-Clans algorithm.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
1999DATEApproximate Equivalence Verification of Sequential Circuits via Genetic Algorithms.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
1999ETSA new BIST architecture for low power circuits.Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1999ITCHigh-level ATPG: a real topic or an academic amusement?Matteo Sonza Reorda
1999VTSEvaluating the Fault Tolerance Capabilities of Embedded Systems via BDM .Maurizio Rebaudengo, Matteo Sonza Reorda
1999SAFECOMPFlexFi: A Flexible Fault Injection Environment for Microprocessor-Based Systems.Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda
1998DATEExploiting Symbolic Techniques for Partial Scan Flip Flop Selection.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante
1998DATEFast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques.Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1998ICCDEnhancing topological ATPG with high-level information and symbolic techniques.Fulvio Corno, Janak H. Patel, Elizabeth M. Rudnick, Matteo Sonza Reorda, Roberto Vietti
1998ICCDVEGA: a verification tool based on genetic algorithms.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
1998ITCA fault injection environment for microprocessor-based boards.Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998SACThe selfish gene algorithm: a new evolutionary optimization strategy.Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
1998VTSOn the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits.Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Matteo Sonza Reorda
1998VTSA Test Pattern Generation Methodology for Low-Power Consumption.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998WCAEThe training environment for the course on microprocessor systems at the Politecnico di Torino.Maurizio Rebaudengo, Matteo Sonza Reorda
1997DATEA new approach to build a low-level malicious fault list starting from high-level description and alternative graphs.Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Raimund Ubar
1997DATEHybrid symbolic-explicit techniques for the graph coloring problem.Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1997DATENew static compaction techniques of test sequences for sequential circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997ICCDA new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
1997ICTAIExploiting Symbolic Techniques within Genetic Algorithms for Power Optimization.S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997ITCTestability Analysis and ATPG on Behavioral RT-Level VHDL.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1997SACSAARA: a simulated annealing algorithm for test pattern generation for digital circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997VTSCellular automata for deterministic sequential test pattern generation.Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996DATESelf-Checking and Fault Tolerant Approaches Can Help BIST Fault Coverage: A Case Study.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996DATEAdvanced Techniques for GA-based sequential ATPGs.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, R. Mosca
1996EDCCOn-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore
1996ICTAIA Genetic Algorithm for Automatic Generation of Test Logic for Digital Circuits.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996ITCComparing Topological, Symbolic and GA-based ATPGs: An Experimental Approach.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996ITCPartial Scan Flip Flop Selection for Simulation-Based Sequential ATPGs.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996PPSNExploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Cicuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996VTSScan insertion criteria for low design impact.Stefano Barbagallo, Monica Lobetti Bodoni, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1995DATEUsing symbolic techniques to find the maximum clique in very large sparse graphs.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1995DATEGARDA: a diagnostic ATPG for large synchronous sequential circuits.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1995ITCTesting a Switching Memory in a Telcommunication System.Stefano Barbagallo, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1995PDPAn improved data parallel algorithm for Boolean function manipulation using BDDs.Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda
1995VTSImproving topological ATPG with symbolic techniques.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Glser, Heinrich Theodor Vierhaus
1995VTSA portable ATPG tool for parallel and distributed systems.Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1994ICECA Genetic Algorithm for Floorplan Area Optimization.Matteo Sonza Reorda, Maurizio Rebaudengo
1994ICTAIGATTO: An Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits.Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1994ITCMaking the Circular Self-Test Path Technique Effective for Real Circuits.Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1994ITCAn Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms.Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1994PDPA BDD Package For A Massively Parallel SIMD Architecture.Gianpiero Cabodi, Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda
1994VTSAn industrial experience in the built-in self test of embedded RAMs.Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina
1993PDPAn experimental analysis of the effects of migration in parallel genetic algorithms.Maurizio Rebaudengo, Matteo Sonza Reorda
1992DACA New Model for Improving symbolic Product Machine Traversal.Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda
1992ITCSequential Circuit Diagnosis Based on Formal Verification Techniques.Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1992VTSA simulation-based approach to test pattern generation for synchronous sequential circuits.Paolo Camurati, Fulvio Corno, Fulvio Prinetto, Matteo Sonza Reorda
1991ICCDFast Differential Fault Simulation by Dynamic Fault Ordering.Gianpiero Cabodi, Silvano Gai, Matteo Sonza Reorda
1990CAVThe Use of Model Checking in ATPG for Sequential Circuits.Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1990ITCA diagnostic test pattern generation algorithm.Paolo Camurati, Davide Medina, Paolo Prinetto, Matteo Sonza Reorda
1988ICCDRandom testability analysis: comparing and evaluating existing approaches.Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda