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Lorena Anghel

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

65

Venues

16

Active years

1999–2026

Best venue rank

C

Where they publish

Papers

65 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEALIFE-BCI: An Adaptive Low-power Integrated Feature Extractor for Brain-Computer Interfaces.Joe Saad, Ivan Miro-Panades, Adrian Evans, Lorena Anghel
2025DATEEnabling a Portable Brain Computer Interface for Rehabilitation of Spinal Cord Injuries.Adrian Evans, Victor Roux-Sibillon, Joe Saad, Ivan Miro-Panades, Tetiana Aksenova, Lorena Anghel
2024DATEEnhancing Reliability of Neural Networks at the Edge: Inverted Normalization with Stochastic Affine Transformations.Soyed Tuhin Ahmed, Kamal Danouchi, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori
2024DATENeuSpin: Design of a Reliable Edge Neuromorphic System Based on Spintronics for Green AI.Soyed Tuhin Ahmed, Kamal Danouchi, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori
2024ETSTesting Spintronics Implemented Monte Carlo Dropout-Based Bayesian Neural Networks.Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori
2023DATEScalable Spintronics-based Bayesian Neural Network for Uncertainty Estimation.Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi B. Tahoori
2023ETSOn Using Cell-Aware Methodology for SRAM Bit Cell Testing.Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory di Pendina, Patrick Girard, Arnaud Virazel
2023ICASSPLeveraging Sparsity with Spiking Recurrent Neural Networks for Energy-Efficient Keyword Spotting.Manon Dampfhoffer, Thomas Mesquida, Emmanuel Hardy, Alexandre Valentian, Lorena Anghel
2023IJCNNImproving the Robustness of Neural Networks to Noisy Multi-Level Non-Volatile Memory-based Synapses.Manon Dampfhoffer, Joel Minguet Lopez, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
2023IOLTSMinimum SRAM Retention Voltage: Insight about optimizing Power Efficiency across Temperature Profile, Process Variation and Aging.Yunus Emre Aslan, Florian Cacho, T. Kumar, D. K. Janardan, A. Kumar, F. Giner, M. Faurichon, Lorena Anghel
2022ICANNInvestigating Current-Based and Gating Approaches for Accurate and Energy-Efficient Spiking Recurrent Neural Networks.Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
2021IOLTSMOZART: Masking Outputs with Zeros for Architectural Robustness and Testing of DNN Accelerators.Stphane Burel, Adrian Evans, Lorena Anghel
2020IOLTSA Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System.Michele Portolan, R. Silveira Feitoza, Ghislain Takam Tchendjou, Vincent Reynaud, Kalpana Senthamarai Kannan, Manuel J. Barragn, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Rgis Leveugle, Salvador Mir
2020ITCNew Perspectives on Core In-field Path Delay Test.Riccardo Cantoro, Dario Foti, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan
2019DATEHidden-Delay-Fault Sensor for Test, Reliability and Security.Giorgio Di Natale, Elena-Ioana Vatajelu, Kalpana Senthamarai Kannan, Lorena Anghel
2019FCCMFlexi-AES: A Highly-Parameterizable Cipher for a Wide Range of Design Constraints.Sergiu Mosanu, Xinfei Guo, Mohamed El-Hadedy, Lorena Anghel, Mircea Stan
2019VTSSpecial Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN).Elena-Ioana Vatajelu, Giorgio Di Natale, Lorena Anghel
2018DATENBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI.Ajith Sivadasan, Riddhi Jitendrakumar Shah, Vincent Huard, Florian Cacho, Lorena Anghel
2018IOLTSResistive and Spintronic RAMs: Device, Simulation, and Applications.Elena-Ioana Vatajelu, Lorena Anghel, Jean-Michel Portal, Marc Bocquet, Guillaume Prenat
2017DATEWorkload dependent reliability timing analysis flow.Ajith Sivadasan, Armelle Notin, Vincent Huard, Etienne Maurin, Souhir Mhira, Florian Cacho, Lorena Anghel
2017IOLTSInvestigation of critical path selection for in-situ monitors insertion.Florian Cacho, Ahmed Benhassain, Riddhi Jitendrakumar Shah, Souhir Mhira, Vincent Huard, Lorena Anghel
2017IOLTSReliability analysis of MTJ-based functional module for neuromorphic computing.Elena-Ioana Vatajelu, Lorena Anghel
2016DATEEarly failure prediction by using in-situ monitors: Implementation and application results.Ahmed Benhassain, Florian Cacho, Vincent Huard, Lorena Anghel
2016DATEStudy of workload impact on BTI HCI induced aging of digital circuits.Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel
2016DATEWorkload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis.Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel
2016DSDSynthesis and Performance Optimization of a Switching Nano-Crossbar Computer.Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Baradaran Tahoori
2016ETSA hybrid algorithm to conservatively check the robustness of circuits.Niels Thole, Lorena Anghel, Grschwin Fey
2016IOLTSActivity profiling: Review of different solutions to develop reliable and performant design.Florian Cacho, Ahmed Benhassain, Souhir Mhira, Ajith Sivadasan, Vincent Huard, P. Cathelin, Vincent Knopik, Abhishek Jain, C. R. Parthasarathy, Lorena Anghel
2016VTSEarly system failure prediction by using aging in situ monitors: Methodology of implementation and application results.Lorena Anghel, Ahmed Benhassain, Ajith Sivadasan, Florian Cacho, Vincent Huard
2015DATEDigital circuits reliability with in-situ monitors in 28nm fully depleted SOI.M. Saliva, Florian Cacho, Vincent Huard, X. Federspiel, D. Angot, Ahmed Benhassain, Alain Bravaix, Lorena Anghel
2014ICCDExploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example.Andreas Steininger, Varadan Savulimedu Veeravalli, Dan Alexandrescu, Enrico Costenaro, Lorena Anghel
2014IOLTSCost-efficient of a cluster in a mesh SRAM-based FPGA.Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel
2013IOLTSFault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chip.Michael G. Dimopoulos, Yi Gang, Mounir Benabdenbi, Lorena Anghel, Nacer-Eddine Zergainoh, Michael Nicolaidis
2012DATEDesign for test and reliability in ultimate CMOS.Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Yervant Zorian, Tanay Karnik, Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Carlos Tokunaga, Arijit Raychowdhury, Muhammad M. Khellah, Jaydeep P. Kulkarni, Vivek De, Dimiter Avresky
2012DDECSEfficient link-level error resilience in 3D NoCs.Vladimir Pasca, Saif-Ur Rehman, Lorena Anghel, Mounir Benabdenbi
2012IOLTSThrough-silicon-via built-in self-repair for aggressive 3D integration.Michael Nicolaidis, Vladimir Pasca, Lorena Anghel
2011ETSI-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems.Michael Nicolaidis, Vladimir Pasca, Lorena Anghel
2011ETSEfficient Fault Detection Architecture Design of Latch-Based Low Power DSP/MCU Processor.Hai Yu, Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh
2011IOLTSMemory BIST with address programmability.Aymen Fradi, Michael Nicolaidis, Lorena Anghel
2010DATEError resilience of intra-die and inter-die communication with 3D spidergon STNoC.Vladimir Pasca, Lorena Anghel, Claudia Rusu, Riccardo Locatelli, Massimo Coppola
2010DSNFault tolerant communication in 3D integrated systems.Vladimir Pasca, Lorena Anghel, Mounir Benabdenbi
2010ETSConfigurable fault-tolerant link for inter-die communication in 3D on-chip networks.Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi
2010IOLTSInterconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems.Michael Nicolaidis, Vladimir Pasca, Lorena Anghel
2010IOLTSConfigurable serial fault-tolerant link for communication in 3D integrated systems.Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi
2010IOLTSRILM: Reconfigurable inter-layer routing mechanism for 3D multi-layer networks-on-chip.Claudia Rusu, Lorena Anghel, Dimiter Avresky
2009DATEHOT TOPIC - Concurrent SoC development and end-to-end planning.Lorena Anghel
2008DSDDigital Implementation of a BIST Method based on Binary Observations.Christophe Le Blanc, ric Colinet, Jrme Juillard, Lorena Anghel
2008IOLTSCommunication Aware Recovery Configurations for Networks-on-Chip.Claudia Rusu, Cristian Grecu, Lorena Anghel
2008ISCASImproving the scalability of checkpoint recovery for networks-on-chip.Claudia Rusu, Cristian Grecu, Lorena Anghel
2007IOLTSEssential Fault-Tolerance Metrics for NoC Infrastructures.Cristian Grecu, Lorena Anghel, Partha Pratim Pande, Andr Ivanov, Resve A. Saleh
2007IOLTSMultiple Event Transient Induced by Nuclear Reactions in CMOS Logic Cells.Claudia Rusu, Antonin Bougerol, Lorena Anghel, Ccile Weulersse, Nadine Buard, S. Benhammadi, Nicolas Renaud, Guillaume Hubert, Frederic Wrobel, Thierry Carrire, Rmi Gaillard
2007IWANNDefects Tolerant Logic Gates for Unreliable Future Nanotechnologies.Lorena Anghel, Michael Nicolaidis
2006IOLTSFrom Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately?Lorena Anghel, Michael Nicolaidis, Nadine Buard
2006IOLTSPrediction of Transient Induced by Neutron/Proton in CMOS Combinational Logic Cells.Guillaume Hubert, Antonin Bougerol, Florent Miller, Nadine Buard, Lorena Anghel, Thierry Carrire, Frederic Wrobel, Rmi Gaillard
2006IOLTSPhase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study.Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel
2005IOLTSEvaluation of SET and SEU Effects at Multiple Abstraction Levels.Lorena Anghel, Rgis Leveugle, Pierre Vanhauwaert
2005IOLTSSimulation and Mitigation of Single Event Effects.Lorena Anghel, Michael Nicolaidis
2005IOLTSOn Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study.Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis
2004PRDCEvaluation of Memory Built-in Self Repair Techniques for High Defect Density Technologie.Lorena Anghel, Nadir Achouri, Michael Nicolaidis
2004VTSA Diversified Memory Built-In Self-Repair Approach for Nanotechnologies.Michael Nicolaidis, Nadir Achouri, Lorena Anghel
2003IOLTSMemory Built-In Self-Repair for Nanotechnologies.Michael Nicolaidis, Nadir Achouri, Lorena Anghel
2003IOLTSA Methodology for Test Replacement Solutions of Obsolete Processors.Raoul Velazco, Lorena Anghel, S. Saleh
2000DATECost Reduction and Evaluation of a Temporary Faults Detecting Technique.Lorena Anghel, Michael Nicolaidis
2000VTSSelf-Checking Circuits versus Realistic Faults in Very Deep Submicron.Lorena Anghel, Michael Nicolaidis, Issam Alzaher-Noufal
1999VTSBuilt-In Current Sensor for IDDQ Testing in Deep Submicron CMOS.Th. Calin, Lorena Anghel, Michael Nicolaidis