Amit Mahesh Joshi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2018–2018
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | ISCAS | VLSI Architecture of High Speed SAD for High Efficiency Video Coding (HEVC) Encoder. | Amit Mahesh Joshi, Mohammad Samar Ansari, Chitrakant Sahu |