Anand Haridass
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2010–2016
Best venue rank
A
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ISLPED | FVCAG: A framework for formal verification driven power modeling and verification. | Arun Joseph, Spandana Rachamalla, Rahul M. Rao, Anand Haridass, Pradeep Kumar Nalla |
| 2015 | ISLPED | FreqLeak: A frequency step based method for efficient leakage power characterization in a system. | Arun Joseph, Anand Haridass, Charles Lefurgy, Sreekanth Pai, Spandana Rachamalla, Francesco Campisano |
| 2015 | VLSID | FirmLeak: A Framework for Efficient and Accurate Runtime Estimation of Leakage Power by Firmware. | Arun Joseph, Anand Haridass, Charles Lefurgy, Spandana Rachamalla, Sreekanth Pai, Diyanesh Chinnakkonda, Vidushi Goyal |
| 2010 | VLSID | Channel Optimization for the Design of High Speed I/O links. | Rohan Mandrekar, Yaping Zhou, Sungjun Chun, Anand Haridass, Jinwoo Choi, Nanju Na, Daniel M. Dreps, Roger D. Weekly, Paul Harvey |