Anand Kumar Sinha
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2007–2026
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | VLSID | Design of a Glitch-Free PLL with Asynchronous Feedback Divider Supporting Multiple Reference Clock Switching. | Manish Rathi, Anand Kumar Sinha, Ateet Omer |
| 2007 | LATA | Universality for Nondeterministic Logspace. | Vinay Choudhary, Anand Kumar Sinha, Somenath Biswas |