| 2018 | ISPASS | Behind the Scenes: Memory Analysis of Graphical Workloads on Tile-Based GPUs. | Germn Ceballos, Andreas Sembrant, Trevor E. Carlson, David Black-Schaffer |
| 2017 | HPCA | A Split Cache Hierarchy for Enabling Data-Oriented Optimizations. | Andreas Sembrant, Erik Hagersten, David Black-Schaffer |
| 2016 | ICCD | Data placement across the cache hierarchy: Minimizing data movement with reuse-aware placement. | Andreas Sembrant, Erik Hagersten, David Black-Schaffer |
| 2015 | ISCA | Cost-effective speculative scheduling in high performance processors. | Arthur Perais, Andr Seznec, Pierre Michaud, Andreas Sembrant, Erik Hagersten |
| 2015 | MICRO | Long term parking (LTP): criticality-aware resource allocation in OOO processors. | Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, Andr Seznec, Pierre Michaud |
| 2014 | ISCA | Navigating the cache hierarchy with a single lookup. | Andreas Sembrant, Erik Hagersten, David Black-Schaffer |
| 2013 | HPCA | Modeling performance variation due to cache sharing. | Andreas Sandberg, Andreas Sembrant, Erik Hagersten, David Black-Schaffer |
| 2013 | MICRO | TLC: a tag-less cache for reducing dynamic first level cache energy. | Andreas Sembrant, Erik Hagersten, David Black-Schaffer |
| 2012 | CGO | Phase guided profiling for fast cache modeling. | Andreas Sembrant, David Black-Schaffer, Erik Hagersten |
| 2012 | MASCOTS | Power-Sleuth: A Tool for Investigating Your Program's Power Behavior. | Vasileios Spiliopoulos, Andreas Sembrant, Stefanos Kaxiras |
| 2012 | SBAC-PAD | Low Overhead Instruction-Cache Modeling Using Instruction Reuse Profiles. | Muneeb Khan, Andreas Sembrant, Erik Hagersten |