Andrew Beaumont-Smith
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1997–2005
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | ARITH | Pain versus Gain in the Hardware Design of FPUs and Supercomputers. | Roger A. Golliver, Silvia M. Mller, Stuart F. Oberman, Martin S. Schmookler, Debjit Das Sarma, Andrew Beaumont-Smith |
| 2001 | ARITH | Parallel Prefix Adder Design. | Andrew Beaumont-Smith, Cheng-Chew Lim |
| 1999 | ARITH | Reduced Latency IEEE Floating-Point Standard Adder Architectures. | Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, Cheng-Chew Lim |
| 1999 | KES | An array processor architecture for support vector learning. | K. To, Cheng-Chew Lim, Andrew Beaumont-Smith, Michael J. Liebelt, W. Marwood |
| 1997 | ARITH | A GaAs 32-bit Adder. | Andrew Beaumont-Smith, Neil Burgess |