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Antonio Garca

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

17

Venues

5

Active years

1998–2010

Best venue rank

B

Where they publish

Papers

17 indexed papers, newest first.

YearVenueTitleAuthors
2010LRECDevelopment and Use of an Evaluation Collection for Personalisation of Digital Newspapers.Alberto Daz, Pablo Gervs, Antonio Garca, Laura Plaza
2008FPLEnhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration.Diego Pedro Morales, Antonio Garca, Alberto J. Palma, Miguel ngel Carvajal, Encarnacin Castillo, Luis F. Capitn-Vallvey
2007CIARPA Precise Electrical Disturbance Generator for Neural Network Training with Real Level Output.Antonio Garca, Carlos Len, igo Monedero, Jorge Ropero
2007FPLIntellectual Property Protection of HDL IP Cores Through Automated Sognature Hosting.Encarnacin Castillo, Luis Parrilla, Antonio Garca, Uwe Meyer-Bse, Antonio Lloris-Ruz
2007FPLExploiting Analog and Digital Reconfiguration for Smart Sensor Interfacing.Diego Pedro Morales, Antonio Garca, Alberto J. Palma, Antonio Martnez-Olmos, Encarnacin Castillo
2006FPLIPP Watermarking Technique for IP Core Protection on FPL Devices.Encarnacin Castillo, Luis Parrilla, Antonio Garca, Antonio Lloris-Ruz, Uwe Meyer-Bse
2005FPLEfficient Embedded FPL Resource Usage for RNS-based Polyphase DWT Filter Banks.Antonio Garca, Javier Ramrez, Uwe Meyer-Bse, Encarnacin Castillo, Antonio Lloris-Ruz
2004FPLArea*Time Optimized Hogenauer Channelizer Design Using FPL Devices.Uwe Meyer-Bse, Suhasini Rao, Javier Ramrez, Antonio Garca
2004FPLIntellectual Property Protection for RNS Circuits on FPGAs.Luis Parrilla, Encarnacin Castillo, Antonio Garca, Antonio Lloris-Ruz
2003FPLDesign and Implementation of RNS-Based Adaptive Filters.Javier Ramrez, Uwe Meyer-Bse, Antonio Garca, Antonio Lloris-Ruz
2002FPLLow Power High Speed Algebraic Integer Frequency Sampling Filters Using FPLDs.Uwe Meyer-Bse, Javier Ramrez, Antonio Garca
2002FPLU. Meyer-Baese, A. Lloris: Fast RNS FPL-based Communications Receiver Design and Implementation.Javier Ramrez, Antonio Garca
2001ICASSPDesign of RNS-based distributed arithmetic DWT filterbanks.Javier Ramrez, Antonio Garca, Uwe Meyer-Bse, Fred J. Taylor, Pedro G. Fernndez, Antonio Lloris-Ruz
2000FPLAnalysis of RNS-FPL Synergy for High Throughput DSP Applications: Discrete Wavelet Transform.Javier Ramrez, Antonio Garca, Pedro G. Fernndez, Luis Parrilla, Antonio Lloris-Ruz
2000ISCASA new architecture to compute the discrete cosine transform using the quadratic residue number system.Javier Ramrez Perez de Inestrosa, Antonio Garca, Pedro G. Fernndez, Luis Parrilla, Antonio Lloris-Ruz
1999ISCASRNS implementation of FIR filters based on distributed arithmetic using field-programmable logic.Antonio Garca, Uwe Meyer-Bse, Antonio Lloris-Ruz, Fred J. Taylor
1998ICASSPPipelined Hogenauer CIC filters using field-programmable logic and residue number system.Antonio Garca, Uwe Meyer-Baese, Fred J. Taylor