| 2018 | IOLTS | Finding False Paths for Sequential Circuits Using Operations on ROBDDs. | Anzhela Yu. Matrosova, Sergei Ostanin, Semen Chernyshov |
| 2017 | IOLTS | Test pattern generation to detect multiple faults in ROBDD based combinational circuits. | Toral Shah, Anzhela Yu. Matrosova, Virendra Singh |
| 2016 | IOLTS | A high performance scan flip-flop design for serial and mixed mode scan test. | Satyadev Ahlawat, Jaynarayan T. Tudu, Anzhela Yu. Matrosova, Virendra Singh |
| 2016 | IOLTS | A fault-tolerant sequential circuit design for SAFs and PDFs soft errors. | Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva |
| 2015 | DDECS | Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB Implementation of Incompletely Specified Boolean Function of the Corresponding Sub-Circuit. | Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko |
| 2015 | IOLTS | Simplification of fully delay testable combinational circuits. | Anzhela Yu. Matrosova, Eugeniy Mitrofanov, Toral Shah |
| 2003 | IOLTS | Designing FPGA based Self-Testing Checkers for m-out-of-n Codes. | Anzhela Yu. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. Nikitin |
| 2002 | IOLTS | Survivable Discrete Circuits Design. | Anzhela Yu. Matrosova, Valentina Andreeva, Yu. Sedov |
| 2001 | IOLTS | Totally Self-Checking FSM Design Based on Multilevel Synthesis Methods and FPGA Implemetation. | Anzhela Yu. Matrosova, K. Nikitin, Olga Goloubeva |
| 2000 | IOLTS | Self-Checking FSM Design with Observing only FSM Outputs. | Anzhela Yu. Matrosova, Sergey Ostanin |