| 2018 | ICICS | FPGA-Based Assessment of Midori and Gift Lightweight Block Ciphers. | Carlos Andres Lara-Nino, Arturo Daz-Prez, Miguel Morales-Sandoval |
| 2016 | DSD | Novel FPGA-Based Low-Cost Hardware Architecture for the PRESENT Block Cipher. | Carlos Andres Lara-Nino, Miguel Morales-Sandoval, Arturo Daz-Prez |
| 2015 | WISTP | DET-ABE: A Java API for Data Confidentiality and Fine-Grained Access Control from Attribute Based Encryption. | Miguel Morales-Sandoval, Arturo Daz-Prez |
| 2013 | DSD | Compact FPGA-Based Hardware Architectures for GF(2^m) Multipliers. | Miguel Morales-Sandoval, Arturo Daz-Prez |
| 2013 | FPL | Area/performance evaluation of digit-digit GF(2 | Miguel Morales-Sandoval, Arturo Daz-Prez |
| 2009 | DSD | FPGA Accelerator for RNA Secondary Structure Prediction. | Arturo Daz-Prez, Mario Alberto Garca-Martnez |
| 2009 | FPL | An FPGA design for evaluating score function in protein energy calculation. | Jose Manuel Romero-Ximil, Arturo Daz-Prez |
| 2005 | ICISC | An FPGA Implementation of CCM Mode Using AES. | Emmanuel Lpez-Trejo, Francisco Rodrguez-Henrquez, Arturo Daz-Prez |
| 2003 | FPL | Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core. | Nazar Abbas Saqib, Francisco Rodrguez-Henrquez, Arturo Daz-Prez |