Atanendu S. Mandal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2012–2019
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | VLSID | Novel Randomized & Biased Placement for FPGA Based Robust Random Number Generator with Enhanced Uniqueness. | Arjun Singh Chauhan, Vineet Sahula, Atanendu S. Mandal |
| 2012 | VLSID | Power Aware Hardware Prototyping of Multiclass SVM Classifier Through Reconfiguration. | Rajesh A. Patil, Gauri Gupta, Vineet Sahula, Atanendu S. Mandal |