| 2024 | SYSTOR | Hybrid Cloud Connector: Offloading integration complexities. | Ronen I. Kat, Doron Chen, Michael Factor, Chris Giblin, Avi Ziv, Aleksander Slominski |
| 2023 | ICML | Neural Network Accelerated Implicit Filtering: Integrating Neural Network Surrogates With Provably Convergent Derivative Free Optimization Methods. | Brian Irwin, Eldad Haber, Raviv Gal, Avi Ziv |
| 2021 | DATE | Automatic Scalable System for the Coverage-Directed Generation (CDG) Problem. | Raviv Gal, Eldad Haber, Wesam Ibraheem, Brian Irwin, Ziv Nevo, Avi Ziv |
| 2020 | DAC | Late Breaking Results: FRIENDS - Finding Related Interesting Events via Neighbor Detection. | Raviv Gal, Haim Kermany, Alexander Ivrii, Ziv Nevo, Avi Ziv |
| 2019 | FMCAD | Challenges and Solutions in Post-Silicon Validation of High-end Processors (Invited Tutorial). | Avi Ziv |
| 2017 | CP | Solving Constraint Satisfaction Problems Containing Vectors of Unknown Size. | Erez Bilgory, Eyal Bin, Avi Ziv |
| 2017 | DAC | Template Aware Coverage: Taking Coverage Analysis to the Next Level. | Raviv Gal, Einat Kermany, Bilal Saleh, Avi Ziv, Michael L. Behm, Bryan G. Hickerson |
| 2017 | DATE | Cost-effective analysis of post-silicon functional coverage events. | Farimah Farahmandi, Ronny Morad, Avi Ziv, Ziv Nevo, Prabhat Mishra |
| 2016 | DAC | Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. | Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco |
| 2014 | DAC | Verification of Transactional Memory in POWER8. | Allon Adir, Dave Goodman, Daniel Hershcovich, Oz Hershkovitz, Bryan G. Hickerson, Karen Holtz, Wisam Kadry, Anatoly Koyfman, John M. Ludden, Charles Meissner, Amir Nahir, Randall R. Pratt, Mike Schiffli, Brett St. Onge, Brian W. Thompto, Elena Tsanko, Avi Ziv |
| 2013 | ICCAD | Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. | Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco |
| 2012 | ASPDAC | Optimizing test-generation to the execution platform. | Amir Nahir, Avi Ziv, Subrat Panda |
| 2012 | DAC | Checking architectural outputs instruction-by-instruction on acceleration platforms. | Debapriya Chatterjee, Anatoly Koyfman, Ronny Morad, Avi Ziv, Valeria Bertacco |
| 2012 | DATE | Generating instruction streams using abstract CSP. | Yoav Katz, Michal Rimon, Avi Ziv |
| 2012 | DATE | Approximating checkers for simulation acceleration. | Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco |
| 2011 | DAC | Threadmill: a post-silicon exerciser for multi-threaded processors. | Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv |
| 2011 | DAC | Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor. | Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann |
| 2011 | DAC | Learning microarchitectural behaviors to improve stimuli generation quality. | Yoav Katz, Michal Rimon, Avi Ziv, Gai Shaked |
| 2011 | DATE | A unified methodology for pre-silicon verification and post-silicon validation. | Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann |
| 2010 | DAC | Bridging pre-silicon verification and post-silicon validation. | Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor |
| 2007 | DAC | Verification Coverage: When is Enough, Enough? | Francine Bacchini, Alan J. Hu, Tom Fitzpatrick, Rajeev Ranjan, David Lacey, Mercedes Tan, Andrew Piziali, Avi Ziv |
| 2006 | DAC | Scheduling-based test-case generation for verification of multimedia SoCs. | Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ronen |
| 2004 | DAC | Defining coverage views to improve functional coverage analysis. | Sigal Asaf, Eitan Marcus, Avi Ziv |
| 2004 | DAC | Probabilistic regression suites for functional verification. | Shai Fine, Shmuel Ur, Avi Ziv |
| 2004 | DATE | Stimuli Generation with Late Binding of Values. | Avi Ziv |
| 2004 | ISoLA | Probabilistic Alternative Regression Suites. | Shady Copty, Shai Fine, Shmuel Ur, Avi Ziv |
| 2003 | ARITH | Solving Range Constraints for Binary Floating-Point Instructions. | Avi Ziv, Merav Aharoni, Sigal Asaf |
| 2003 | DAC | Coverage directed test generation for functional verification using bayesian networks. | Shai Fine, Avi Ziv |
| 2003 | DATE | Cross-Product Functional Coverage Measurement with Temporal Properties-Based Assertions . | Avi Ziv |
| 2003 | FDL | Functional Verification Environment for Object-oriented Hardware Designs. | Avi Ziv |
| 2002 | DAC | Hole analysis for functional coverage data. | Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv |
| 2001 | ITC | Cost evaluation of coverage directed test generation for the IBM mainframe. | Gilly Nativ, Steven Mittermaier, Shmuel Ur, Avi Ziv |
| 1998 | DAC | User Defined Coverage - A Tool Supported Methodology for Design Verification. | Raanan Grinwald, Eran Harel, Michael Orgad, Shmuel Ur, Avi Ziv |
| 1998 | DAC | Design Reliability - Estimation through Statistical Analysis of Bug Discovery Data. | Yossi Malka, Avi Ziv |
| 1996 | ISSRE | An on-line algorithm for checkpoint placement. | Avi Ziv, Jehoshua Bruck |
| 1994 | DAC | Placement and Routing for a Field Programmable Multi-Chip Module. | Sanko Lan, Avi Ziv, Abbas El Gamal |
| 1994 | SRDS | Analysis of Checkpointing Schemes for Multiprocessor Systems. | Avi Ziv, Jehoshua Bruck |