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Beata Bylina

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

27

Venues

4

Active years

2004–2026

Best venue rank

C

Where they publish

Papers

27 indexed papers, newest first.

YearVenueTitleAuthors
2026ICCSGPU Accelerated Hough Transform for Line Detection.Damian Gradziuk, Beata Bylina, Przemyslaw Stpiczynski
2026ICCSOptimizing the Performance and Efficiency of a Hybrid Video Encoder in Java.Maciej Okon, Beata Bylina
2025CSEDUTeaching Parallel Programming on the CPU Based on Matrix Multiplication Using MKL, OpenMP and SYCL Libraries.Emilia Bober, Beata Bylina
2025FedCSISA Multithreaded Java-Based Video Encoder for Multicore Systems.Beata Bylina, Maciej Okon
2025ICCSTime and Energy Consumption of Multithreaded Matrix Factorization Using Various Compilers Optimizations.Beata Bylina, Monika Piekarz, Jaroslaw Bylina
2024FedCSISAnalysis of end-to-end test automation tools based on the examples of Selenium WebDriver and Playwright.Beata Bylina, Agnieszka Antonczak
2024ICCSEnergy Efficiency of Multithreaded WZ Factorization with the Use of OpenMP and OpenACC on CPU and GPU.Beata Bylina, Jaroslaw Bylina
2023FedCSISImpact of processor frequency scaling on performance and energy consumption for WZ factorization on multicore architecture.Beata Bylina, Jaroslaw Bylina, Monika Piekarz
2023FedCSISThe scalability in terms of the time and the energy for several matrix factorizations on a multicore machine.Beata Bylina, Monika Piekarz
2022FedCSISInfluence of loop transformations on performance and energy consumption of the multithreded WZ factorization.Beata Bylina, Jaroslaw Bylina, Monika Piekarz
2021FedCSISThe impact of vectorization and parallelization of the slope algorithm on performance and energy efficiency on multi-core architecture.Beata Bylina, Joanna Potiopa, Michal Klisowski, Jaroslaw Bylina
2018FedCSISAn effective sparse storage scheme for GPU-enabled uniformization method.Beata Bylina, Jaroslaw Bylina, Marek Karwacki
2017FedCSISOpenMP Thread Affinity for Matrix Factorization on Multicore Systems.Beata Bylina, Jaroslaw Bylina
2016FedCSISParallelizing nested loops on the Intel Xeon Phi on the example of the dense WZ factorization.Jaroslaw Bylina, Beata Bylina
2016FedCSISData Structures for Markov Chain Transition Matrices on Intel Xeon Phi.Beata Bylina, Joanna Potiopa
2015FedCSISStrategies of parallelizing nested loops on the multicore architectures on the example of the WZ factorization for the dense matrices.Beata Bylina, Jaroslaw Bylina
2014FedCSISPerformance analysis of the WZ factorization in MATLAB.Beata Bylina, Jaroslaw Bylina
2014FedCSISPerformance Analysis of Multicore and Multinodal Implementation of SpMV Operation.Beata Bylina, Jaroslaw Bylina, Przemyslaw Stpiczynski, Dominik Szalkowski
2013FedCSISMixed precision iterative refinement techniques for the WZ factorization.Beata Bylina, Jaroslaw Bylina
2013PPAMAn Efficient Representation on GPU for Transition Rate Matrices for Markov Chains.Jaroslaw Bylina, Beata Bylina, Marek Karwacki
2012FedCSISGPU-accelerated WZ Factorization with the Use of the CUBLAS Library.Beata Bylina, Jaroslaw Bylina
2012FedCSISMulti-GPU Implementation of the Uniformization Method for Solving Markov Models.Marek Karwacki, Beata Bylina, Jaroslaw Bylina
2011FedCSISThe incomplete factorization preconditioners applied to the GMRES(m) method for solving Markov chains.Beata Bylina, Jaroslaw Bylina
2011FedCSISThe influence of a matrix condition number on iterative methods' convergence.Anna Pyzara, Beata Bylina, Jaroslaw Bylina
2008ICCSAnalysis and Comparison of Reordering for Two Factorization Methods (LU and WZ) for Sparse Matrices.Beata Bylina, Jaroslaw Bylina
2007PPAMIncomplete WZ Factorization as an Alternative Method of Preconditioning for Solving Markov Chains.Beata Bylina, Jaroslaw Bylina
2004ICCSThe Vectorized and Parallelized Solving of Markovian Models for Optical Networks.Beata Bylina, Jaroslaw Bylina