| 2019 | CATA | Customized Intrusion Detection Based on a Database Audit Log. | Thomas Le, William Mitchell, Behnam S. Arad |
| 2010 | CATA | A Hardware Implementation of the Advanced Encryption Standard (AES) Algorithm using SystemVerilog. | Bahram Hakhamaneshi, Behnam S. Arad |
| 2008 | CATA | A Behavioral Simulator for PCI-Express Transaction Layer. | Behnam S. Arad, Hong Chang |
| 2007 | CATA | Modeling and Verification of the Physical Layer of PCI Express. | Mohamed Mahmoud, Behnam S. Arad |
| 2005 | CAINE | PCI-EXPRESS Transaction Layer and Application Layer of A 3-Port Switch. | Ashraf El-Nakhal, Behnam S. Arad |
| 2005 | CATA | A 32-bit Residue Arithmetic Unit for High Performance Embedded Systems. | Behnam S. Arad, Sachin Rudrapatna |
| 2005 | CATA | Prototyping an Embedded Bus-Based Parallel System. | Chung-Seok (Andy) Seo, Abhijit Chatterjee, Timothy J. Drabik, Behnam S. Arad, Reena Patel |
| 2002 | CAINE | An Efficient Arithmetic Unit Based on Residue Number System. | Behnam S. Arad, Ashwin K. Sutrave |
| 2001 | CAINE | Design and Simulation of a Pipelined Microprocessor. | Chia-Hung Kuo, Behnam S. Arad |
| 2001 | CATA | A pipelined processor suitable for a bus-based parallel architecture. | Behnam S. Arad, Hung-Ru Shih |
| 2000 | CATA | Design of a processing element for bus-based parallel computing. | Behnam S. Arad, Chien-Hsun Wang |