Bing-Feng Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2011–2012
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ISCAS | A 2 - 8 GHz multi-phase distributed DLL using phase insertion in 90 nm. | Min-Han Hsieh, Bing-Feng Lin, Yu-Shun Wang, Hao-Huei Chang, Charlie Chung-Ping Chen |
| 2011 | ISCAS | A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. | Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen |
| 2011 | ISCAS | A 12 Gb/s chip-to-chip AC coupled transceiver. | Yu-Shun Wang, Min-Han Hsieh, Yi-Chi Wu, Chia-Ming Liu, Hsien-Chen Chiu, Bing-Feng Lin, Charlie Chung-Ping Chen |