| 2007 | CASES | A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots. | Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter |
| 2005 | FPL | Mapping an H.264/AVC Decoder onto the ADRES Reconfigurable Architecture. | Bingfeng Mei, Francisco-Javier Veredas, Bart Masschelein |
| 2005 | FPL | Custom Implementation of the Coarse-Grained Reconfigurable ADRES Architecture for Multimedia Purposes. | Francisco-Javier Veredas, Michael Scheppler, Will Moffat, Bingfeng Mei |
| 2004 | DATE | Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. | Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins |
| 2004 | RTSS | Design Style Case Study for Embedded Multi Media Compute Nodes. | Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frdric Robert, Jordi Carrabina Bordoll |
| 2003 | DATE | Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. | Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins |
| 2003 | FPL | ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. | Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins |
| 2001 | FPL | Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware. | Yajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man |