| 2025 | ISCAS | Sparsity-Aware Optimization of In-Memory Bayesian Binary Neural Network Accelerators. | Prabodh Katti, Bashir M. Al-Hashimi, Bipin Rajendran |
| 2024 | ISCAS | Bayesian Inference Accelerator for Spiking Neural Networks. | Prabodh Katti, Anagha Nimbekar, Chen Li, Amit Acharyya, Bashir M. Al-Hashimi, Bipin Rajendran |
| 2024 | PIMRC | Satellite Adaptive Onboard Beamforming Using Neuromorphic Processors. | Wallace A. Martins, Eva Lagunas, Nicolas Skatchkovsky, Flor Ortiz, Geoffrey Eappen, Osvaldo Simeone, Bipin Rajendran, Symeon Chatzinotas |
| 2023 | ISCAS | Bayesian Inference on Binary Spiking Networks Leveraging Nanoscale Device Stochasticity. | Prabodh Katti, Nicolas Skatchkovsky, Osvaldo Simeone, Bipin Rajendran, Bashir M. Al-Hashimi |
| 2021 | ISCAS | Hybrid In-Memory Computing Architecture for the Training of Deep Neural Networks. | Vinay Joshi, Wangxin He, Jae-sun Seo, Bipin Rajendran |
| 2020 | DATE | An On-Chip Learning Accelerator for Spiking Neural Networks using STT-RAM Crossbar Arrays. | Shruti R. Kulkarni, Shihui Yin, Jae-sun Seo, Bipin Rajendran |
| 2020 | ISCAS | ESSOP: Efficient and Scalable Stochastic Outer Product Architecture for Deep Learning. | Vinay Joshi, Geethan Karunaratne, Manuel Le Gallo, Irem Boybat, Christophe Piveteau, Abu Sebastian, Bipin Rajendran, Evangelos Eleftheriou |
| 2018 | EANN | Acceleration of Convolutional Networks Using Nanoscale Memristive Devices. | Shruti R. Kulkarni, Anakha V. Babu, Bipin Rajendran |
| 2018 | ICASSP | Training Probabilistic Spiking Neural Networks with First- To-Spike Decoding. | Alireza Bagheri, Osvaldo Simeone, Bipin Rajendran |
| 2018 | ISCAS | Live Demonstration: Image Classification Using Bio-inspired Spiking Neural Networks. | Shruti R. Kulkarni, John M. Alexiades, Bipin Rajendran |
| 2018 | ISCAS | Mixed-precision architecture based on computational memory for training deep neural networks. | S. R. Nandakumar, Manuel Le Gallo, Irem Boybat, Bipin Rajendran, Abu Sebastian, Evangelos Eleftheriou |
| 2015 | EANN | Scalable Digital CMOS Architecture for Spike Based Supervised Learning. | Shruti R. Kulkarni, Bipin Rajendran |
| 2015 | HPCA | Reducing read latency of phase change memory via early read and Turbo Read. | Prashant J. Nair, Chia-Chen Chou, Bipin Rajendran, Moinuddin K. Qureshi |
| 2015 | ICCD | Increasing reconfigurability with memristive interconnects. | John Demme, Bipin Rajendran, Steven M. Nowick, Simha Sethumadhavan |
| 2015 | IJCNN | NormAD - Normalized Approximate Descent based supervised learning rule for spiking neurons. | Navin Anwani, Bipin Rajendran |
| 2015 | IJCNN | Composer classification based on temporal coding in adaptive spiking neural networks. | Chaitanya Prasad N, Krishnakant V. Saboo, Bipin Rajendran |
| 2015 | IJCNN | C. elegans chemotaxis inspired neuromorphic circuit for contour tracking and obstacle avoidance. | Shibani Santurkar, Bipin Rajendran |
| 2015 | IJCNN | Arithmetic computing via rate coding in neural circuits with spike-triggered adaptive synapses. | Sushrut Thorat, Bipin Rajendran |
| 2015 | ISCAS | Live demonstration: Spiking neural circuit based navigation inspired by C. elegans thermotaxis. | Chirag Shetty, Sri Nitchith, Rishabh Rawat, S. R. Nandakumar, Pritesh Shah, Shruti R. Kulkarni, Bipin Rajendran |
| 2015 | VLSID | Tutorial T1: Neuromorphic Computing - Algorithms, Devices and Systems. | Bipin Rajendran, Udaya S. Ganguly, Manan Suri |
| 2014 | IJCNN | Mimicking the worm - An adaptive spiking neural circuit for contour tracking inspired by C. Elegans thermotaxis. | Ashish Bora, Arjun Rao, Bipin Rajendran |
| 2014 | IJCNN | Analog memristive time dependent learning using discrete nanoscale RRAM devices. | Aniket Singha, Bhaskaran Muralidharan, Bipin Rajendran |
| 2013 | VLSID | Embedded tutorial - Can silicon machines match the efficiency of the human brain? | Bipin Rajendran |
| 2012 | HPCA | Efficient scrub mechanisms for error-prone emerging memories. | Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viji Srinivasan |
| 2010 | ISIT | Coding for sensing in Content Addressable Memories. | Luis Alfonso Lastras-Montao, Michele Franceschini, Bipin Rajendran, C. Lam |
| 2002 | ISCAS | Timing analysis of tree-like RLC circuits. | Bipin Rajendran, Veerbhan Kheterpal, Abhishek Das, Jayanta Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti |