| 2008 | DAC | Automatic architecture refinement techniques for customizing processing elements. | Bita Gorjiara, Daniel Gajski |
| 2008 | DAC | C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). | Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski |
| 2007 | ASPDAC | Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. | Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou |
| 2007 | FPGA | FPGA-friendly code compression for horizontal microcoded custom IPs. | Bita Gorjiara, Daniel Gajski |
| 2007 | ICCD | A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. | Bita Gorjiara, Daniel Gajski |
| 2006 | ASPDAC | Designing a custom architecture for DCT using NISC technology. | Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski |
| 2006 | DSD | A Graph Based Algorithm for Data Path Optimization in Custom Processors. | Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski |
| 2006 | ICCD | Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . | Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski |
| 2005 | ICCD | Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. | Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski |
| 2004 | ASPDAC | Fast and efficient voltage scheduling by evolutionary slack distribution. | Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen |
| 2004 | ISLPED | An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes. | Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou |